From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Tue, 16 Sep 2014 22:15:24 +0200 Subject: [U-Boot] [PATCH 25/35] arm: socfpga: fpga: Add SoCFPGA FPGA programming interface In-Reply-To: <541811DE.1030202@monstr.eu> References: <1410779188-6880-1-git-send-email-marex@denx.de> <201409161212.51446.marex@denx.de> <541811DE.1030202@monstr.eu> Message-ID: <201409162215.24264.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Tuesday, September 16, 2014 at 12:33:02 PM, Michal Simek wrote: > On 09/16/2014 12:12 PM, Marek Vasut wrote: > > On Tuesday, September 16, 2014 at 11:42:00 AM, Michal Simek wrote: > >> On 09/15/2014 01:06 PM, Marek Vasut wrote: > >>> From: Pavel Machek > >>> > >>> Add code necessary to program the FPGA part of SoCFPGA from U-Boot > >>> with an RBF blob. This patch also integrates the code into the > >>> FPGA driver framework in U-Boot so it can be used via the 'fpga' > >>> command. > >>> > >>> Signed-off-by: Pavel Machek > >>> Signed-off-by: Marek Vasut > >>> Cc: Chin Liang See > >>> Cc: Dinh Nguyen > >>> Cc: Albert Aribaud > >>> Cc: Tom Rini > >>> Cc: Wolfgang Denk > >>> Cc: Pavel Machek > >>> --- > >>> > >>> arch/arm/cpu/armv7/socfpga/Makefile | 3 +- > >>> arch/arm/cpu/armv7/socfpga/fpga_manager.c | 354 > >>> +++++++++++++++++++++++ > >> > >> We have drivers/fpga and you should move this driver there to be visible > >> for others. Maybe also nios can use this driver with some changes. > > > > Good point about the move, but how could NIOS possibly use this ? > > I don't know the architecture but I expect that this fpga_manager > can also work with partial bitstream. > It means the flow is. > 1. load full bitstream with NIOS > 2. NIOS become security manager and own this driver > 3. NIOS is able to load partial bitstreams via this device. > > Not sure if this realistic flow on socfpga but this is possible to do > on our fpga. > That's why IMHO this driver should be in drivers/fpga. > > Also look at my xilinx fpga changes I have done recently and > you should change that altera code to look the same and remove > that ugly ifdef mess. I did clean that up to a certain degree. It was truly hideous. Who's picking up the patches for drivers/fpga/ nowadays ? Best regards, Marek Vasut