From mboxrd@z Thu Jan  1 00:00:00 1970
From: Damien Lespiau <damien.lespiau@intel.com>
Subject: Re: [PATCH 24/89] drm/i915/skl: Allow the reg_read
 ioctl to return RCS_TIMESTAMP
Date: Mon, 22 Sep 2014 14:27:29 +0100
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To: Rodrigo Vivi <rodrigo.vivi@gmail.com>
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On Tue, Sep 16, 2014 at 06:27:04PM -0700, Rodrigo Vivi wrote:
>    This seems to allow more than just the RCS timestamp, but also allow
>    the I915_REG_READ ioctl for gen9.

Well, yes, this array is the white list for the reg_read ioctl, so
that's expected.

>    Anyway:
>    Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>    On Thu, Sep 4, 2014 at 4:26 AM, Damien Lespiau <damien.lespiau@intel.com>
>    wrote:
> 
>      Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
>      ---
>       drivers/gpu/drm/i915/intel_uncore.c | 2 +-
>       1 file changed, 1 insertion(+), 1 deletion(-)
> 
>      diff --git a/drivers/gpu/drm/i915/intel_uncore.c
>      b/drivers/gpu/drm/i915/intel_uncore.c
>      index 918b761..3b27fb0 100644
>      --- a/drivers/gpu/drm/i915/intel_uncore.c
>      +++ b/drivers/gpu/drm/i915/intel_uncore.c
>      @@ -968,7 +968,7 @@ static const struct register_whitelist {
>              /* supported gens, 0x10 for 4, 0x30 for 4 and 5, etc. */
>              uint32_t gen_bitmask;
>       } whitelist[] = {
>      -       { RING_TIMESTAMP(RENDER_RING_BASE), 8, GEN_RANGE(4, 8) },
>      +       { RING_TIMESTAMP(RENDER_RING_BASE), 8, GEN_RANGE(4, 9) },
>       };
> 
>       int i915_reg_read_ioctl(struct drm_device *dev,
>      --
>      1.8.3.1
> 
>      _______________________________________________
>      Intel-gfx mailing list
>      Intel-gfx@lists.freedesktop.org
>      http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
>    --
>    Rodrigo Vivi
>    Blog: http://blog.vivi.eng.br
>