Re: [PATCH] drm/i915: WaRsClearFWBitsAtReset - WA for blitter, render and media forcewake on BDW and GEN9 platforms.

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Mon, Sep 22, 2014 at 02:43:02PM -0400, Suketu Shah wrote:
> The newly loaded Gfx driver must first initialize the forcewake request register
> for render, media and blitter engines by clearing all forcewake bits (0xFFFF0000).
> This applies to BDW and GEN9 platforms.

Already done
intel_uncore_init()->intel_uncore_early_sanitize()->intel_uncore_forcewake_reset()

> 
> Change-Id: I633c530340a5918c084249a188d0397ed4f51a41
> Signed-off-by: Suketu Shah <suketu.j.shah@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_uncore.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index c9bf39e..9d94497 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1345,6 +1345,14 @@ void intel_uncore_init(struct drm_device *dev)
>  		dev_priv->uncore.funcs.mmio_readq  = gen4_read64;
>  		break;
>  	}
> +
> +	/* WaRsClearFWBitsAtReset: The newly loaded Gfx driver must first initialize the
> +	  * forcewake request register for render, media and blitter engines by clearing
> +	  * all forcewake bits (0xFFFF0000) on resets.
> +	  * This applies to BDW and Gen9 platforms.
> +	  */
> +	if (IS_BROADWELL(dev) || IS_GEN9(dev))
> +		intel_uncore_forcewake_reset(dev, false);
>  }
>  
>  void intel_uncore_fini(struct drm_device *dev)
> -- 
> 2.1.0
> 
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-- 
Ville Syrjälä
Intel OTC