From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ig0-f180.google.com ([209.85.213.180]:53644 "EHLO mail-ig0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753059AbaIXN0N (ORCPT ); Wed, 24 Sep 2014 09:26:13 -0400 Received: by mail-ig0-f180.google.com with SMTP id a13so6476938igq.7 for ; Wed, 24 Sep 2014 06:26:13 -0700 (PDT) Date: Wed, 24 Sep 2014 07:26:10 -0600 From: Bjorn Helgaas To: Minghuan Lian Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Zang Roy-R61911 , Hu Mingkai-B21284 , Scott Wood , Yoder Stuart-B08248 , Arnd Bergmann Subject: Re: [PATCH] PCI: designware: Fix IO resource end address calculation Message-ID: <20140924132610.GB13850@google.com> References: <1411482540-31297-1-git-send-email-Minghuan.Lian@freescale.com> <1411482540-31297-2-git-send-email-Minghuan.Lian@freescale.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <1411482540-31297-2-git-send-email-Minghuan.Lian@freescale.com> Sender: linux-pci-owner@vger.kernel.org List-ID: On Tue, Sep 23, 2014 at 10:28:57PM +0800, Minghuan Lian wrote: > End address should be equal to start_addr + size - 1. > The patch fixes PCI IO resource end address calculation. > > Signed-off-by: Minghuan Lian Applied to pci/host-designware with Mohit's ack for v3.18, thanks! > --- > drivers/pci/host/pcie-designware.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c > index 0f3cb2a..c19184f7 100644 > --- a/drivers/pci/host/pcie-designware.c > +++ b/drivers/pci/host/pcie-designware.c > @@ -459,7 +459,7 @@ int __init dw_pcie_host_init(struct pcie_port *pp) > pp->io.end = min_t(resource_size_t, > IO_SPACE_LIMIT, > range.pci_addr + range.size > - + global_io_offset); > + + global_io_offset - 1); > pp->io_size = resource_size(&pp->io); > pp->io_bus_addr = range.pci_addr; > pp->io_base = range.cpu_addr; > -- > 1.9.1 > From mboxrd@z Thu Jan 1 00:00:00 1970 From: bhelgaas@google.com (Bjorn Helgaas) Date: Wed, 24 Sep 2014 07:26:10 -0600 Subject: [PATCH] PCI: designware: Fix IO resource end address calculation In-Reply-To: <1411482540-31297-2-git-send-email-Minghuan.Lian@freescale.com> References: <1411482540-31297-1-git-send-email-Minghuan.Lian@freescale.com> <1411482540-31297-2-git-send-email-Minghuan.Lian@freescale.com> Message-ID: <20140924132610.GB13850@google.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tue, Sep 23, 2014 at 10:28:57PM +0800, Minghuan Lian wrote: > End address should be equal to start_addr + size - 1. > The patch fixes PCI IO resource end address calculation. > > Signed-off-by: Minghuan Lian Applied to pci/host-designware with Mohit's ack for v3.18, thanks! > --- > drivers/pci/host/pcie-designware.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c > index 0f3cb2a..c19184f7 100644 > --- a/drivers/pci/host/pcie-designware.c > +++ b/drivers/pci/host/pcie-designware.c > @@ -459,7 +459,7 @@ int __init dw_pcie_host_init(struct pcie_port *pp) > pp->io.end = min_t(resource_size_t, > IO_SPACE_LIMIT, > range.pci_addr + range.size > - + global_io_offset); > + + global_io_offset - 1); > pp->io_size = resource_size(&pp->io); > pp->io_bus_addr = range.pci_addr; > pp->io_base = range.cpu_addr; > -- > 1.9.1 >