diff for duplicates of <20140925230340.19023.22674@quantum> diff --git a/a/1.txt b/N1/1.txt index 9889314..13f2a67 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -3,7 +3,7 @@ Quoting Maxime Ripard (2014-09-13 03:26:03) > > Hi, > > > > On Fri, Sep 12, 2014 at 5:02 AM, Maxime Ripard -> > <maxime.ripard@free-electrons.com> wrote: +> > <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote: > > > Hi, > > > > > > On Sat, Sep 06, 2014 at 06:47:24PM +0800, Chen-Yu Tsai wrote: @@ -12,7 +12,7 @@ Quoting Maxime Ripard (2014-09-13 03:26:03) > > >> the pre-divider on the PLL6 input, thus allowing the clock to > > >> be muxed to PLL6 with proper clock rate calculation. > > >> -> > >> Signed-off-by: Chen-Yu Tsai <wens@csie.org> +> > >> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org> > > > > > > It looks fine, but I'd rather see this in a separate file, especially > > > since we don't seem to have any order dependency. diff --git a/a/content_digest b/N1/content_digest index b1416f7..cc8e7b5 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,10 +3,20 @@ "ref\020140911210211.GM31276@lukather\0" "ref\0CAGb2v66L36nsoucSgLY8pV8f=wjKTvtjJby43Z=Ct+NiRonptQ@mail.gmail.com\0" "ref\020140913102603.GZ31276@lukather\0" - "From\0mturquette@linaro.org (Mike Turquette)\0" - "Subject\0[PATCH 3/7] clk: sunxi: unify sun6i AHB1 clock with proper PLL6 pre-divider\0" + "From\0Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" + "Subject\0Re: [PATCH 3/7] clk: sunxi: unify sun6i AHB1 clock with proper PLL6 pre-divider\0" "Date\0Thu, 25 Sep 2014 16:03:40 -0700\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>" + " Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>\0" + "Cc\0Emilio Lopez <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org>" + Vinod Koul <vinod.koul-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> + Dan Williams <dan.j.williams-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> + Grant Likely <grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> + Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> + linux-arm-kernel <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> + linux-sunxi <linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org> + dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + " devicetree <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>\0" "\00:1\0" "b\0" "Quoting Maxime Ripard (2014-09-13 03:26:03)\n" @@ -14,7 +24,7 @@ "> > Hi,\n" "> > \n" "> > On Fri, Sep 12, 2014 at 5:02 AM, Maxime Ripard\n" - "> > <maxime.ripard@free-electrons.com> wrote:\n" + "> > <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:\n" "> > > Hi,\n" "> > >\n" "> > > On Sat, Sep 06, 2014 at 06:47:24PM +0800, Chen-Yu Tsai wrote:\n" @@ -23,7 +33,7 @@ "> > >> the pre-divider on the PLL6 input, thus allowing the clock to\n" "> > >> be muxed to PLL6 with proper clock rate calculation.\n" "> > >>\n" - "> > >> Signed-off-by: Chen-Yu Tsai <wens@csie.org>\n" + "> > >> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>\n" "> > >\n" "> > > It looks fine, but I'd rather see this in a separate file, especially\n" "> > > since we don't seem to have any order dependency.\n" @@ -59,4 +69,4 @@ "> Embedded Linux, Kernel and Android engineering\n" > http://free-electrons.com -6877f5337e39a965c94d1564412623725bd9579c7e43569b510944d012237398 +d8f886cf35a4a680a1d72ccd10e8c645c7dfc8846ab5c4338eec73fc967f4f63
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