From mboxrd@z Thu Jan 1 00:00:00 1970 From: Konrad Rzeszutek Wilk Subject: Re: [PATCH v12 for-xen-4.5 03/20] x86/VPMU: Set MSR bitmaps only for HVM/PVH guests Date: Fri, 26 Sep 2014 10:59:24 -0400 Message-ID: <20140926145924.GD14378@laptop.dumpdata.com> References: <1411673336-32736-1-git-send-email-boris.ostrovsky@oracle.com> <1411673336-32736-4-git-send-email-boris.ostrovsky@oracle.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <1411673336-32736-4-git-send-email-boris.ostrovsky@oracle.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Boris Ostrovsky Cc: kevin.tian@intel.com, keir@xen.org, jbeulich@suse.com, jun.nakajima@intel.com, andrew.cooper3@citrix.com, tim@xen.org, dietmar.hahn@ts.fujitsu.com, xen-devel@lists.xen.org, Aravind.Gopalakrishnan@amd.com, suravee.suthikulpanit@amd.com, dgdegra@tycho.nsa.gov List-Id: xen-devel@lists.xenproject.org On Thu, Sep 25, 2014 at 03:28:39PM -0400, Boris Ostrovsky wrote: > In preparation for making VPMU code shared with PV make sure that we we update > MSR bitmaps only for HVM/PVH guests > > Signed-off-by: Boris Ostrovsky > Acked-by: Kevin Tian Reviewed-by: Konrad Rzeszutek Wilk > --- > xen/arch/x86/hvm/svm/vpmu.c | 21 +++++++++++++-------- > xen/arch/x86/hvm/vmx/vpmu_core2.c | 8 +++++--- > 2 files changed, 18 insertions(+), 11 deletions(-) > > diff --git a/xen/arch/x86/hvm/svm/vpmu.c b/xen/arch/x86/hvm/svm/vpmu.c > index 8e07a98..c7e0946 100644 > --- a/xen/arch/x86/hvm/svm/vpmu.c > +++ b/xen/arch/x86/hvm/svm/vpmu.c > @@ -244,7 +244,8 @@ static int amd_vpmu_save(struct vcpu *v) > > context_save(v); > > - if ( !vpmu_is_set(vpmu, VPMU_RUNNING) && ctx->msr_bitmap_set ) > + if ( !vpmu_is_set(vpmu, VPMU_RUNNING) && > + has_hvm_container_domain(v->domain) && ctx->msr_bitmap_set ) > amd_vpmu_unset_msr_bitmap(v); > > return 1; > @@ -287,8 +288,9 @@ static int amd_vpmu_do_wrmsr(unsigned int msr, uint64_t msr_content, > ASSERT(!supported); > > /* For all counters, enable guest only mode for HVM guest */ > - if ( (get_pmu_reg_type(msr) == MSR_TYPE_CTRL) && > - !(is_guest_mode(msr_content)) ) > + if ( has_hvm_container_domain(v->domain) && > + (get_pmu_reg_type(msr) == MSR_TYPE_CTRL) && > + !is_guest_mode(msr_content) ) > { > set_guest_mode(msr_content); > } > @@ -303,8 +305,9 @@ static int amd_vpmu_do_wrmsr(unsigned int msr, uint64_t msr_content, > apic_write(APIC_LVTPC, PMU_APIC_VECTOR); > vpmu->hw_lapic_lvtpc = PMU_APIC_VECTOR; > > - if ( !((struct amd_vpmu_context *)vpmu->context)->msr_bitmap_set ) > - amd_vpmu_set_msr_bitmap(v); > + if ( has_hvm_container_domain(v->domain) && > + !((struct amd_vpmu_context *)vpmu->context)->msr_bitmap_set ) > + amd_vpmu_set_msr_bitmap(v); > } > > /* stop saving & restore if guest stops first counter */ > @@ -314,8 +317,9 @@ static int amd_vpmu_do_wrmsr(unsigned int msr, uint64_t msr_content, > apic_write(APIC_LVTPC, PMU_APIC_VECTOR | APIC_LVT_MASKED); > vpmu->hw_lapic_lvtpc = PMU_APIC_VECTOR | APIC_LVT_MASKED; > vpmu_reset(vpmu, VPMU_RUNNING); > - if ( ((struct amd_vpmu_context *)vpmu->context)->msr_bitmap_set ) > - amd_vpmu_unset_msr_bitmap(v); > + if ( has_hvm_container_domain(v->domain) && > + ((struct amd_vpmu_context *)vpmu->context)->msr_bitmap_set ) > + amd_vpmu_unset_msr_bitmap(v); > release_pmu_ownship(PMU_OWNER_HVM); > } > > @@ -406,7 +410,8 @@ static void amd_vpmu_destroy(struct vcpu *v) > if ( !vpmu_is_set(vpmu, VPMU_CONTEXT_ALLOCATED) ) > return; > > - if ( ((struct amd_vpmu_context *)vpmu->context)->msr_bitmap_set ) > + if ( has_hvm_container_domain(v->domain) && > + ((struct amd_vpmu_context *)vpmu->context)->msr_bitmap_set ) > amd_vpmu_unset_msr_bitmap(v); > > xfree(vpmu->context); > diff --git a/xen/arch/x86/hvm/vmx/vpmu_core2.c b/xen/arch/x86/hvm/vmx/vpmu_core2.c > index 68b6272..c9f6ae4 100644 > --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c > +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c > @@ -335,7 +335,8 @@ static int core2_vpmu_save(struct vcpu *v) > __core2_vpmu_save(v); > > /* Unset PMU MSR bitmap to trap lazy load. */ > - if ( !vpmu_is_set(vpmu, VPMU_RUNNING) && cpu_has_vmx_msr_bitmap ) > + if ( !vpmu_is_set(vpmu, VPMU_RUNNING) && > + has_hvm_container_domain(v->domain) && cpu_has_vmx_msr_bitmap ) > core2_vpmu_unset_msr_bitmap(v->arch.hvm_vmx.msr_bitmap); > > return 1; > @@ -448,7 +449,8 @@ static int core2_vpmu_msr_common_check(u32 msr_index, int *type, int *index) > { > __core2_vpmu_load(current); > vpmu_set(vpmu, VPMU_CONTEXT_LOADED); > - if ( cpu_has_vmx_msr_bitmap ) > + if ( has_hvm_container_domain(current->domain) && > + cpu_has_vmx_msr_bitmap ) > core2_vpmu_set_msr_bitmap(current->arch.hvm_vmx.msr_bitmap); > } > return 1; > @@ -822,7 +824,7 @@ static void core2_vpmu_destroy(struct vcpu *v) > return; > xfree(core2_vpmu_cxt->pmu_enable); > xfree(vpmu->context); > - if ( cpu_has_vmx_msr_bitmap ) > + if ( has_hvm_container_domain(v->domain) && cpu_has_vmx_msr_bitmap ) > core2_vpmu_unset_msr_bitmap(v->arch.hvm_vmx.msr_bitmap); > release_pmu_ownship(PMU_OWNER_HVM); > vpmu_reset(vpmu, VPMU_CONTEXT_ALLOCATED); > -- > 1.8.1.4 > > > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xen.org > http://lists.xen.org/xen-devel