From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 2/2] drm/i915: only run hsw_power_well_post_enable when really needed
Date: Tue, 7 Oct 2014 23:00:54 +0300 [thread overview]
Message-ID: <20141007200054.GF32511@intel.com> (raw)
In-Reply-To: <1412709071-1886-2-git-send-email-przanoni@gmail.com>
On Tue, Oct 07, 2014 at 04:11:11PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> Only run it after we actually enable the power well. When we're
> booting the machine there are cases where we run
> hsw_power_well_post_enable without really needing, and even though
> this is not causing any real bugs, it is unneeded and causes confusion
> to people debugging interrupts.
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Seems perfectly sensible.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 36749b9..39c33e0 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -221,9 +221,9 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv,
> if (wait_for((I915_READ(HSW_PWR_WELL_DRIVER) &
> HSW_PWR_WELL_STATE_ENABLED), 20))
> DRM_ERROR("Timeout enabling power well\n");
> + hsw_power_well_post_enable(dev_priv);
> }
>
> - hsw_power_well_post_enable(dev_priv);
> } else {
> if (enable_requested) {
> I915_WRITE(HSW_PWR_WELL_DRIVER, 0);
> --
> 2.1.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
next prev parent reply other threads:[~2014-10-07 20:01 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-07 19:11 [PATCH 1/2] drm/i915: properly reenable gen8 pipe IRQs Paulo Zanoni
2014-10-07 19:11 ` [PATCH 2/2] drm/i915: only run hsw_power_well_post_enable when really needed Paulo Zanoni
2014-10-07 20:00 ` Ville Syrjälä [this message]
2014-10-22 18:34 ` Daniel Vetter
2014-10-07 19:58 ` [Intel-gfx] [PATCH 1/2] drm/i915: properly reenable gen8 pipe IRQs Ville Syrjälä
2014-10-07 20:36 ` Paulo Zanoni
2014-10-07 21:02 ` [PATCH] " Paulo Zanoni
2014-10-08 8:25 ` [Intel-gfx] " Jani Nikula
2014-10-08 18:36 ` Paulo Zanoni
2014-10-08 13:49 ` [Intel-gfx] " Jani Nikula
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