Re: [PATCH 16/18] Disabled bus scan time PCI IRQ assignment on ia64

[Bjorn Helgaas <bhelgaas@google.com>]

On Thu, Oct 02, 2014 at 05:07:44AM +0100, matt@masarand.com wrote:
> From: Matthew Minter <matt@masarand.com>
> 
> Most of the architectures are switched to allocating IRQs at device_enable
> time instead of boot time, however ia64 does not provide an easy way of
> making that transition so the new code is disabled here on ia64.
> 
> Signed-off-by: Matthew Minter <matt@masarand.com>
> 
> ---
>  arch/ia64/pci/pci.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
> index 291a582..398d5d4 100644
> --- a/arch/ia64/pci/pci.c
> +++ b/arch/ia64/pci/pci.c
> @@ -483,6 +483,9 @@ int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
>  {
>  	struct pci_controller *controller = bridge->bus->sysdata;
>  
> +	bridge->swizzle_irq = NULL;
> +	bridge->map_irq = NULL;

Since ->swizzle_irq and ->map_irq default to NULL anyway, isn't this a
no-op?

>  	ACPI_COMPANION_SET(&bridge->dev, controller->companion);
>  	return 0;
>  }
> -- 
> 2.1.0
>