From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH v2 09/14] drm/i915: disable/re-enable PCI device around S4 freeze/thaw Date: Fri, 24 Oct 2014 10:51:53 +0200 Message-ID: <20141024085153.GZ26941@phenom.ffwll.local> References: <1414081408-20498-1-git-send-email-imre.deak@intel.com> <1414081408-20498-10-git-send-email-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-wi0-f170.google.com (mail-wi0-f170.google.com [209.85.212.170]) by gabe.freedesktop.org (Postfix) with ESMTP id B6C0F6E58E for ; Fri, 24 Oct 2014 01:51:44 -0700 (PDT) Received: by mail-wi0-f170.google.com with SMTP id n3so656006wiv.5 for ; Fri, 24 Oct 2014 01:51:43 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1414081408-20498-10-git-send-email-imre.deak@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Imre Deak Cc: intel-gfx@lists.freedesktop.org, shuang.he@linux.intel.com List-Id: intel-gfx@lists.freedesktop.org On Thu, Oct 23, 2014 at 07:23:23PM +0300, Imre Deak wrote: > We already disable everything during S4 freeze, except the PCI device > itself. There is no reason why we couldn't disable that too and doing > so allows us to unify these handlers in the next patch with the > corresponding S3 suspend/resume handlers. > = > Signed-off-by: Imre Deak > Reviewed-by: Ville Syrj=E4l=E4 It feels like I've asked you this already, but could this perhaps fix the ominous S4 issues we're seeing on hsw+? There should be a few QA reports in bugzilla about it. -Daniel > --- > drivers/gpu/drm/i915/i915_drv.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_= drv.c > index 4524c61..be4cb1d 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -1019,12 +1019,11 @@ static int i915_pm_freeze_late(struct device *dev) > { > struct pci_dev *pdev =3D to_pci_dev(dev); > struct drm_device *drm_dev =3D pci_get_drvdata(pdev); > - struct drm_i915_private *dev_priv =3D drm_dev->dev_private; > = > if (drm_dev->switch_power_state =3D=3D DRM_SWITCH_POWER_OFF) > return 0; > = > - return intel_suspend_complete(dev_priv); > + return i915_drm_suspend_late(drm_dev); > } > = > static int i915_pm_thaw_early(struct device *dev) > @@ -1035,7 +1034,7 @@ static int i915_pm_thaw_early(struct device *dev) > if (drm_dev->switch_power_state =3D=3D DRM_SWITCH_POWER_OFF) > return 0; > = > - return i915_drm_thaw_early(drm_dev); > + return i915_resume_early(drm_dev); > } > = > static int i915_pm_thaw(struct device *dev) > -- = > 1.8.4 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch