From: Peter Zijlstra <peterz@infradead.org>
To: Kan Liang <kan.liang@intel.com>
Cc: eranian@google.com, linux-kernel@vger.kernel.org,
mingo@redhat.com, paulus@samba.org, acme@kernel.org,
jolsa@redhat.com, ak@linux.intel.com, "Yan,
Zheng" <zheng.z.yan@intel.com>
Subject: Re: [PATCH V6 01/17] perf, x86: Reduce lbr_sel_map size
Date: Fri, 24 Oct 2014 11:39:30 +0200 [thread overview]
Message-ID: <20141024093930.GD12706@worktop.programming.kicks-ass.net> (raw)
In-Reply-To: <1413755712-8259-2-git-send-email-kan.liang@intel.com>
On Sun, Oct 19, 2014 at 05:54:56PM -0400, Kan Liang wrote:
This should still very much have:
From: Yan, Zheng <zheng.z.yan@intel.com>
Seeing how you did not write this patch, probably true for all the
others too, although I've not checked yet.
> The index of lbr_sel_map is bit value of perf branch_sample_type.
> PERF_SAMPLE_BRANCH_MAX is 1024 at present, so each lbr_sel_map uses
> 4096 bytes. By using bit shift as index, we can reduce lbr_sel_map
> size to 40 bytes. This patch defines 'bit shift' for branch types,
> and use 'bit shift' to define lbr_sel_maps.
>
> Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com>
> Signed-off-by: Kan Liang <kan.liang@intel.com>
> Reviewed-by: Stephane Eranian <eranian@google.com>
> ---
next prev parent reply other threads:[~2014-10-24 9:39 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-19 21:54 [PATCH V6 00/17] perf, x86: Haswell LBR call stack support Kan Liang
2014-10-19 21:54 ` [PATCH V6 01/17] perf, x86: Reduce lbr_sel_map size Kan Liang
2014-10-24 9:39 ` Peter Zijlstra [this message]
2014-11-04 1:07 ` Liang, Kan
2014-11-04 7:14 ` Peter Zijlstra
2014-11-04 7:16 ` Peter Zijlstra
2014-10-19 21:54 ` [PATCH V6 02/17] perf, core: introduce pmu context switch callback Kan Liang
2014-10-19 21:54 ` [PATCH V6 03/17] perf, x86: use context switch callback to flush LBR stack Kan Liang
2014-10-19 21:54 ` [PATCH V6 04/17] perf, x86: Basic Haswell LBR call stack support Kan Liang
2014-10-19 21:55 ` [PATCH V6 05/17] perf, core: pmu specific data for perf task context Kan Liang
2014-10-19 21:55 ` [PATCH V6 06/17] perf, core: always switch pmu specific data during context switch Kan Liang
2014-10-19 21:55 ` [PATCH V6 07/17] perf, x86: allocate space for storing LBR stack Kan Liang
2014-10-19 21:55 ` [PATCH V6 08/17] perf, x86: track number of events that use LBR callstack Kan Liang
2014-10-19 21:55 ` [PATCH V6 09/17] perf, x86: Save/resotre LBR stack during context switch Kan Liang
2014-10-19 21:55 ` [PATCH V6 10/17] perf, core: simplify need branch stack check Kan Liang
2014-10-19 21:55 ` [PATCH V6 11/17] perf, core: expose LBR call stack to user perf tool Kan Liang
2014-10-19 21:55 ` [PATCH V6 12/17] perf, x86: re-organize code that implicitly enables LBR/PEBS Kan Liang
2014-10-19 21:55 ` [PATCH V6 13/17] perf, x86: enable LBR callstack when recording callchain Kan Liang
2014-10-24 13:39 ` Jiri Olsa
2014-10-24 14:49 ` Liang, Kan
2014-10-19 21:55 ` [PATCH V6 14/17] perf, x86: disable FREEZE_LBRS_ON_PMI when LBR operates in callstack mode Kan Liang
2014-10-19 21:55 ` [PATCH V6 15/17] perf, x86: Discard zero length call entries in LBR call stack Kan Liang
2014-10-19 21:55 ` [PATCH V6 16/17] perf tools: handle LBR call stack data Kan Liang
2014-10-19 21:55 ` [PATCH V6 17/17] perf tools: choose to dump callchain from LBR and FP Kan Liang
2014-10-24 13:36 ` Jiri Olsa
2014-10-24 13:55 ` Jiri Olsa
2014-10-24 15:20 ` Liang, Kan
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