[U-Boot] [PATCH] arm: socfpga: Add example config entry for EPCS/EPCQ SPI

[Marek Vasut <marex@denx.de>]

On Thursday, October 30, 2014 at 12:22:57 PM, Pavel Machek wrote:
> On Thu 2014-10-30 10:30:25, Marek Vasut wrote:
> > Add example config file entry for the Altera SPI controller. This SPI
> > controller can also, under special conditions, be used to operate the
> > EPCS/EPCQ SPI NOR.
> > 
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Chin Liang See <clsee@altera.com>
> > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> > Cc: Vince Bridgers <vbridger@altera.com>
> 
> Acked-by: Pavel Machek <pavel@denx.de>
> 
> > --- a/include/configs/socfpga_common.h
> > +++ b/include/configs/socfpga_common.h
> > @@ -79,6 +79,25 @@
> > 
> >  #define CONFIG_SYS_PL310_BASE		SOCFPGA_MPUL2_ADDRESS
> >  
> >  /*
> > 
> > + * EPCS/EPCQx1 Serial Flash Controller
> > + */
> > +#ifdef CONFIG_ALTERA_SPI
> > +#define CONFIG_CMD_SPI
> > +#define CONFIG_CMD_SF
> > +#define CONFIG_SF_DEFAULT_SPEED		30000000
> > +#define CONFIG_SPI_FLASH
> > +#define CONFIG_SPI_FLASH_STMICRO
> > +#define CONFIG_SPI_FLASH_BAR
> > +/*
> > + * The base address is configurable in QSys, each board must specify the
> > + * base address based on it's particular FPGA configuration. Please note
> > + * that the address here is incremented by  0x400  from the Base address
> 
> Are the double spaces around 0x400 intentional?

Yes, to stress it out and align the text to a nice block ;-)

Best regards,
Marek Vasut