From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Subject: Re: [PATCH 01/17] drm/tegra: dc: Add powergate support Date: Tue, 4 Nov 2014 13:34:34 +0100 Message-ID: <20141104123432.GB23240@ulmo.nvidia.com> References: <1415006868-318-1-git-send-email-thierry.reding@gmail.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0635887121==" Return-path: Received: from mail-pa0-f42.google.com (mail-pa0-f42.google.com [209.85.220.42]) by gabe.freedesktop.org (Postfix) with ESMTP id F3BCA6E37D for ; Tue, 4 Nov 2014 04:34:39 -0800 (PST) Received: by mail-pa0-f42.google.com with SMTP id bj1so14368257pad.15 for ; Tue, 04 Nov 2014 04:34:39 -0800 (PST) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Sean Paul Cc: dri-devel List-Id: dri-devel@lists.freedesktop.org --===============0635887121== Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="NMuMz9nt05w80d4+" Content-Disposition: inline --NMuMz9nt05w80d4+ Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Nov 03, 2014 at 12:15:38PM -0500, Sean Paul wrote: > On Mon, Nov 3, 2014 at 4:27 AM, Thierry Reding = wrote: > > From: Thierry Reding > > > > Both display controllers are in their own power partition. Currently the > > driver relies on the assumption that these partitions are on (which is > > the hardware default). However some bootloaders may disable them, so the > > driver must make sure to turn them back on to avoid hangs. > > >=20 > A bug in our firmware caused the host1x block to be in a bad state on > boot such that we had to pulse the reset control in kernel probe to > recover. I'm not sure how paranoid you want to be here, but something > to keep in mind. I think I'd rather not do that. The reason is simple: eventually what I'd like to do is implement a way for firmware to hand over display to the kernel so we can seamlessly transition graphics. If we pulse reset for any of the blocks we can no longer do that. Thierry --NMuMz9nt05w80d4+ Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAEBAgAGBQJUWMfYAAoJEN0jrNd/PrOhw98QALHvlXy964s6Efrxc62Nm8hc bzCYrX5sb0OLp8sKHwZEsvOhQ4TG3Eg0HBPa4P0CM0/ppfXZh4J60zlf0ak4jawY k05MY4E2g78R6mhVmuXSyfZUYxFk8tGFKlHqFMkFsfXRaSitvHyKej5brJcKKx0j C+q84V2E4kMVGV1hMNOcNSdkrDruS6iBq6tlWeOCDAcrgueCrgWitUtPSe228ziG tQ7PUm/VFIyUmyMKXrnMryUBKFxUHlpNydCYaz0nlyLmsMVjxP0oFysYkrzXi0u7 xE1y2zjJJ58mJRSmKOsxb6F5PqCj9UMnI91RL1VcxHaNj4Eq1q1f4x63n3faHtyg hje5jsAADD/Aa7OFSwHL6PFjf766F6jE5EWCF0Xzjf+nL/Qte1okl6eHtFj/9lik gTZH4Uzy9ADNlkSPqjK3MwFx9KjqNnILtQsfF210dvIdZSXdST8lGk0B8+Lr6hZ6 9HLM6wz+92hON+6oSVa5TOwGFT7WjaKOJ7v4/4X8jhDjCToIedEF7RF+y376NAFh Ey8GFgHs3Qwpw5+nulISMSeb7gO8CdbGdBMI1GZdizTsrmj8y3lRHOw1hESLxu7I dD8DcUT1sr3UZ3HmQ29wpAfa1con/Ec8TIgYKd9NauMcONrJ43ghvST5UH6Q3dnU cmiKnTo4C1Hy9x0dKjLK =BgR/ -----END PGP SIGNATURE----- --NMuMz9nt05w80d4+-- --===============0635887121== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVs IG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHA6Ly9saXN0 cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK --===============0635887121==--