From: Ralf Baechle <ralf@linux-mips.org>
To: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>,
"Steven J. Hill" <Steven.Hill@imgtec.com>,
linux-mips@linux-mips.org, linux-pm@vger.kernel.org,
Fuxin Zhang <zhangfx@lemote.com>,
Zhangjin Wu <wuzhangjin@gmail.com>,
Hongliang Tao <taohl@lemote.com>
Subject: Re: [PATCH V2 12/12] MIPS: Loongson: Make CPUFreq usable for Loongson-3
Date: Tue, 11 Nov 2014 11:57:48 +0100 [thread overview]
Message-ID: <20141111105748.GK27259@linux-mips.org> (raw)
In-Reply-To: <1415081928-25899-1-git-send-email-chenhc@lemote.com>
On Tue, Nov 04, 2014 at 02:18:48PM +0800, Huacai Chen wrote:
> diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
> index c94c4e9..01d676a 100644
> --- a/arch/mips/kernel/smp.c
> +++ b/arch/mips/kernel/smp.c
> @@ -136,7 +136,8 @@ asmlinkage void start_secondary(void)
> calibrate_delay();
> preempt_disable();
> cpu = smp_processor_id();
> - cpu_data[cpu].udelay_val = loops_per_jiffy;
> + if (!cpu_data[cpu].udelay_val)
> + cpu_data[cpu].udelay_val = loops_per_jiffy;
Why this? Is the idea that the value of loops_per_jiffy which was set
on bootup may no longer match the actual clock frequency?
Ralf
next prev parent reply other threads:[~2014-11-11 10:57 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-04 6:18 [PATCH V2 12/12] MIPS: Loongson: Make CPUFreq usable for Loongson-3 Huacai Chen
2014-11-11 10:57 ` Ralf Baechle [this message]
2014-11-11 11:02 ` Huacai Chen
2014-11-11 11:07 ` Ralf Baechle
2014-11-11 11:25 ` Huacai Chen
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