Re: [PATCH 2/5] drm/i915: Read the CCK fuse register from CCK

From: Daniel Vetter <daniel@ffwll.ch>
To: Deepak S <deepak.s@intel.com>
Cc: intel-gfx@lists.freedesktop.org, Mika Kuoppala <mika.kuoppala@intel.com>
Subject: Re: [PATCH 2/5] drm/i915: Read the CCK fuse register from CCK
Date: Tue, 11 Nov 2014 16:28:16 +0100	[thread overview]
Message-ID: <20141111152816.GD25711@phenom.ffwll.local> (raw)
In-Reply-To: <5462CFB7.8080102@intel.com>

On Wed, Nov 12, 2014 at 08:40:47AM +0530, Deepak S wrote:
> 
> On Saturday 08 November 2014 01:03 AM, ville.syrjala@linux.intel.com wrote:
> >From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> >When reading a CCK register we should obviously read it from CCK not
> >Punit. This problem has been present ever since this of code was
> >introduced in
> >
> >  commit 67c3bf6f55a97a0915a0f9ea07278a3073cc9601
> >  Author: Deepak S <deepak.s@linux.intel.com>
> >  Date:   Thu Jul 10 13:16:24 2014 +0530
> >
> >     drm/i915: populate mem_freq/cz_clock for chv
> >
> >The problem was raised during review by Mika [1] but somehow slipped
> >through the cracks, and the patch got applied with the problem unfixed.
> >
> >[1] http://lists.freedesktop.org/archives/intel-gfx/2014-July/048937.html
> >
> >Cc: Deepak S <deepak.s@linux.intel.com>
> >Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> >Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >---
> >  drivers/gpu/drm/i915/intel_pm.c | 5 ++++-
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> >
> >diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> >index 9285dee..befad36 100644
> >--- a/drivers/gpu/drm/i915/intel_pm.c
> >+++ b/drivers/gpu/drm/i915/intel_pm.c
> >@@ -5253,7 +5253,10 @@ static void cherryview_init_gt_powersave(struct drm_device *dev)
> >  	mutex_lock(&dev_priv->rps.hw_lock);
> >-	val = vlv_punit_read(dev_priv, CCK_FUSE_REG);
> >+	mutex_lock(&dev_priv->dpio_lock);
> >+	val = vlv_cck_read(dev_priv, CCK_FUSE_REG);
> >+	mutex_unlock(&dev_priv->dpio_lock);
> >+
> >  	switch ((val >> 2) & 0x7) {
> >  	case 0:
> >  	case 1:
> >
> >
> Oops i missed the  comment.
> Reviewed-by: Deepak S <deepak.s@linux.intel.com>

Queued for -next, thanks for the patch.

Deepak, can you please review the other patches in Ville's series here,
too?

Thanks, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx