From mboxrd@z Thu Jan 1 00:00:00 1970 From: andrew@lunn.ch (Andrew Lunn) Date: Fri, 21 Nov 2014 21:22:53 +0100 Subject: [PATCHv5 05/10] arm: mvebu: define and use common Armada 370 SPI pinctrl settings In-Reply-To: References: Message-ID: <20141121202253.GE20238@lunn.ch> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Arnaud > diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi > index 90e1286d414f..f1284ae0cddd 100644 > --- a/arch/arm/boot/dts/armada-370.dtsi > +++ b/arch/arm/boot/dts/armada-370.dtsi > @@ -197,6 +197,20 @@ > status = "disabled"; > }; > > + /* > + * Default SPI pinctrl setting, can be overwritten on > + * board level if a different configuration is used. > + */ > + spi0: spi at 10600 { > + pinctrl-0 = <&spi0_pins1>; > + pinctrl-names = "default"; > + }; > + > + spi1: spi at 10680 { > + pinctrl-0 = <&spi1_pins>; > + pinctrl-names = "default"; > + }; > + Again, ordering. It looks like these should be between l2-cache and i2c0. Andrew From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Lunn Subject: Re: [PATCHv5 05/10] arm: mvebu: define and use common Armada 370 SPI pinctrl settings Date: Fri, 21 Nov 2014 21:22:53 +0100 Message-ID: <20141121202253.GE20238@lunn.ch> References: Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Arnaud Ebalard Cc: Jason Cooper , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Ben Peddell , Russell King , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Rob Herring , Pawel Moll , Mark Rutland , Stephen Warren , Ian Campbell , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org Hi Arnaud > diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi > index 90e1286d414f..f1284ae0cddd 100644 > --- a/arch/arm/boot/dts/armada-370.dtsi > +++ b/arch/arm/boot/dts/armada-370.dtsi > @@ -197,6 +197,20 @@ > status = "disabled"; > }; > > + /* > + * Default SPI pinctrl setting, can be overwritten on > + * board level if a different configuration is used. > + */ > + spi0: spi@10600 { > + pinctrl-0 = <&spi0_pins1>; > + pinctrl-names = "default"; > + }; > + > + spi1: spi@10680 { > + pinctrl-0 = <&spi1_pins>; > + pinctrl-names = "default"; > + }; > + Again, ordering. It looks like these should be between l2-cache and i2c0. Andrew -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html