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From: Dave Jones <davej@redhat.com>
To: Andi Kleen <ak@linux.intel.com>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	zheng.z.yan@intel.com, peterz@infradead.org, eranian@google.com
Subject: Re: perf/x86/intel/uncore: Add Haswell-EP uncore support
Date: Wed, 26 Nov 2014 10:26:46 -0500	[thread overview]
Message-ID: <20141126152646.GA7984@redhat.com> (raw)
In-Reply-To: <20141126141422.GM10824@tassilo.jf.intel.com>

On Wed, Nov 26, 2014 at 06:14:22AM -0800, Andi Kleen wrote:
 > > I couldn't quickly decipher which MSRs we're writing to here in the SDM,
 > > but are these really 64-bit wide registers that need 32 bits always set to zero ?
 > 
 > Yes the filter MSRs are only 32bit.

thanks for checking.

 > > I'm wondering if these should be just wrmsr's instead of wrmsrl's.
 > 
 > Can we just shut up coverity please?

I can manually dismiss them, I don't think the checker has the
information to determine this for itself.

	Dave

  reply	other threads:[~2014-11-26 15:27 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20141013152950.11DE26610F1@gitolite.kernel.org>
2014-11-25 23:20 ` perf/x86/intel/uncore: Add Haswell-EP uncore support Dave Jones
2014-11-26 14:14   ` Andi Kleen
2014-11-26 15:26     ` Dave Jones [this message]
2014-11-27 19:49       ` Andi Kleen
2014-11-27 22:30         ` Thomas Gleixner

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