From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: s/MI_STORE_DWORD_IMM_GEN8/MI_STORE_DWORD_IMM_GEN4/
Date: Fri, 5 Dec 2014 14:51:03 +0200 [thread overview]
Message-ID: <20141205125103.GJ10649@intel.com> (raw)
In-Reply-To: <1415981816-9852-1-git-send-email-ville.syrjala@linux.intel.com>
On Fri, Nov 14, 2014 at 06:16:56PM +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> MI_STORE_DWORD_IMM length has been the same ever since gen4. Rename
> the define to avoid potential confusion if someone tries to use this
> on pre-gen8.
>
> Also correct the comment on MI_MEM_VIRTUAL bit. It's present on 945,g33
> and 965 only.
>
> Cc: Oscar Mateo <oscar.mateo@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
ping
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4 ++--
> drivers/gpu/drm/i915/intel_lrc.c | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 3de58ac..5228493 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -280,8 +280,8 @@
> #define MI_SEMAPHORE_POLL (1<<15)
> #define MI_SEMAPHORE_SAD_GTE_SDD (1<<12)
> #define MI_STORE_DWORD_IMM MI_INSTR(0x20, 1)
> -#define MI_STORE_DWORD_IMM_GEN8 MI_INSTR(0x20, 2)
> -#define MI_MEM_VIRTUAL (1 << 22) /* 965+ only */
> +#define MI_STORE_DWORD_IMM_GEN4 MI_INSTR(0x20, 2)
> +#define MI_MEM_VIRTUAL (1 << 22) /* 945,g33,965 */
> #define MI_STORE_DWORD_INDEX MI_INSTR(0x21, 1)
> #define MI_STORE_DWORD_INDEX_SHIFT 2
> /* Official intel docs are somewhat sloppy concerning MI_LOAD_REGISTER_IMM:
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 6025ac7..649d9ba 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1188,7 +1188,7 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf)
> if (ret)
> return ret;
>
> - cmd = MI_STORE_DWORD_IMM_GEN8;
> + cmd = MI_STORE_DWORD_IMM_GEN4;
> cmd |= MI_GLOBAL_GTT;
>
> intel_logical_ring_emit(ringbuf, cmd);
> --
> 2.0.4
--
Ville Syrjälä
Intel OTC
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next prev parent reply other threads:[~2014-12-05 12:51 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-14 16:16 [PATCH] drm/i915: s/MI_STORE_DWORD_IMM_GEN8/MI_STORE_DWORD_IMM_GEN4/ ville.syrjala
2014-11-15 4:43 ` [PATCH] drm/i915: shuang.he
2014-12-05 12:51 ` Ville Syrjälä [this message]
2014-12-08 14:57 ` [PATCH] drm/i915: s/MI_STORE_DWORD_IMM_GEN8/MI_STORE_DWORD_IMM_GEN4/ Dave Gordon
2014-12-08 16:05 ` Ville Syrjälä
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