From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mike Turquette Subject: Re: [PATCH] clk: samsung: Fix Exynos 5420 pinctrl setup and clock disable failure due to domain being gated Date: Wed, 17 Dec 2014 07:23:22 -0800 Message-ID: <20141217152322.29014.7739@quantum> References: <1417788934-23447-1-git-send-email-k.kozlowski@samsung.com> <1418129982.19339.6.camel@AMDC1943> <5486F69B.6020005@samsung.com> <7hlhmfo1b0.fsf@deeprootsystems.com> <7h8ui8h7n9.fsf@deeprootsystems.com> <1418718015.28527.4.camel@AMDC1943> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: Received: from mail-pa0-f52.google.com ([209.85.220.52]:65096 "EHLO mail-pa0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751229AbaLQPXa convert rfc822-to-8bit (ORCPT ); Wed, 17 Dec 2014 10:23:30 -0500 Received: by mail-pa0-f52.google.com with SMTP id eu11so16425483pac.25 for ; Wed, 17 Dec 2014 07:23:30 -0800 (PST) In-Reply-To: <1418718015.28527.4.camel@AMDC1943> Sender: linux-samsung-soc-owner@vger.kernel.org List-Id: linux-samsung-soc@vger.kernel.org To: Krzysztof Kozlowski , Kevin Hilman Cc: Sylwester Nawrocki , Tomasz Figa , Stephen Boyd , Kukjin Kim , linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Javier Martinez Canillas , Kyungmin Park , Marek Szyprowski , Bartlomiej Zolnierkiewicz Quoting Krzysztof Kozlowski (2014-12-16 00:20:15) > On pon, 2014-12-15 at 14:26 -0800, Kevin Hilman wrote: > > Kevin Hilman writes: > >=20 > > > Sylwester Nawrocki writes: > > > > > >> On 09/12/14 13:59, Krzysztof Kozlowski wrote: > > >>> On pi=C4=85, 2014-12-05 at 15:15 +0100, Krzysztof Kozlowski wro= te: > > >>>> > Audio subsystem clocks are located in separate block. On Exy= nos 5420 if > > >>>> > clock for this block (from main clock domain) 'mau_epll' is = gated then > > >>>> > any read or write to audss registers will block. > > >>>> >=20 > > >>>> > This kind of boot hang was observed on Arndale Octa and Peac= h Pi/Pit > > >>>> > after introducing runtime PM to pl330 DMA driver. After that= commit the > > >>>> > 'mau_epll' was gated, because the "amba" clock was disabled = and there > > >>>> > were no more users of mau_epll. > > >>>> >=20 > > >>>> > The system hang on one of steps: > > >>>> > 1. Disabling unused clocks from audss block. > > >>>> > 2. During audss GPIO setup (just before probing i2s0 because > > >>>> > samsung_pinmux_setup() tried to access memory from audss = block which was > > >>>> > gated. > > >>>> >=20 > > >>>> > Add a workaround for this by enabling the 'mau_epll' clock i= n probe. > > >>>> >=20 > > >>>> > Signed-off-by: Krzysztof Kozlowski > > >>>> > --- > > >>>> > drivers/clk/samsung/clk-exynos-audss.c | 29 +++++++++++++++= +++++++++++++- > > >>>> > 1 file changed, 28 insertions(+), 1 deletion(-) > > >>> > > >>> Sorry for pinging so quick but merge window is open and it look= s like > > >>> booting Exynos542x boards will be broken (because pl330 will no= longer > > >>> hold adma clock enabled so whole audss domain will be gated). > > >>>=20 > > >>> This is a non-intrusive workaround for that issue, as wanted by > > >>> Sylwester: > > >>> https://lkml.org/lkml/2014/12/5/223 > > >>>=20 > > >>> Any comments on this? > > >> > > >> The patch looks OK to me, it would be good though if someone els= e > > >> has confirmed it fixes the bug. I don't have any clock patches q= ueued > > >> at the moment. Perhaps you could apply it directly, Mike ? > > > > > > I confirm it fixes the boot hang in linux-next (next-20141210) on= my > > > exynos5800-peach-pi and exynos5420-arndale-octa. Tested both > > > exynos_defconfig and multi_v7_defconfig. > > > > > > Tested-by: Kevin Hilman > >=20 > > What's the status of this patch? linux-next is still broken for se= veral > > Exynos5 platforms without this fix. >=20 > I believe not only next is broken but also current mainline because > runtime PM for pl330 was merged yesterday... >=20 > The patch received two tested-bys (Kevin's and Javier's) and Sylweste= r's > ack. >=20 > Mike, could you pick the patch and send it to Linus after rc1? Will do. Regards, Mike >=20 > Best regards, > Krzysztof >=20 From mboxrd@z Thu Jan 1 00:00:00 1970 From: mturquette@linaro.org (Mike Turquette) Date: Wed, 17 Dec 2014 07:23:22 -0800 Subject: [PATCH] clk: samsung: Fix Exynos 5420 pinctrl setup and clock disable failure due to domain being gated In-Reply-To: <1418718015.28527.4.camel@AMDC1943> References: <1417788934-23447-1-git-send-email-k.kozlowski@samsung.com> <1418129982.19339.6.camel@AMDC1943> <5486F69B.6020005@samsung.com> <7hlhmfo1b0.fsf@deeprootsystems.com> <7h8ui8h7n9.fsf@deeprootsystems.com> <1418718015.28527.4.camel@AMDC1943> Message-ID: <20141217152322.29014.7739@quantum> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Quoting Krzysztof Kozlowski (2014-12-16 00:20:15) > On pon, 2014-12-15 at 14:26 -0800, Kevin Hilman wrote: > > Kevin Hilman writes: > > > > > Sylwester Nawrocki writes: > > > > > >> On 09/12/14 13:59, Krzysztof Kozlowski wrote: > > >>> On pi?, 2014-12-05 at 15:15 +0100, Krzysztof Kozlowski wrote: > > >>>> > Audio subsystem clocks are located in separate block. On Exynos 5420 if > > >>>> > clock for this block (from main clock domain) 'mau_epll' is gated then > > >>>> > any read or write to audss registers will block. > > >>>> > > > >>>> > This kind of boot hang was observed on Arndale Octa and Peach Pi/Pit > > >>>> > after introducing runtime PM to pl330 DMA driver. After that commit the > > >>>> > 'mau_epll' was gated, because the "amba" clock was disabled and there > > >>>> > were no more users of mau_epll. > > >>>> > > > >>>> > The system hang on one of steps: > > >>>> > 1. Disabling unused clocks from audss block. > > >>>> > 2. During audss GPIO setup (just before probing i2s0 because > > >>>> > samsung_pinmux_setup() tried to access memory from audss block which was > > >>>> > gated. > > >>>> > > > >>>> > Add a workaround for this by enabling the 'mau_epll' clock in probe. > > >>>> > > > >>>> > Signed-off-by: Krzysztof Kozlowski > > >>>> > --- > > >>>> > drivers/clk/samsung/clk-exynos-audss.c | 29 ++++++++++++++++++++++++++++- > > >>>> > 1 file changed, 28 insertions(+), 1 deletion(-) > > >>> > > >>> Sorry for pinging so quick but merge window is open and it looks like > > >>> booting Exynos542x boards will be broken (because pl330 will no longer > > >>> hold adma clock enabled so whole audss domain will be gated). > > >>> > > >>> This is a non-intrusive workaround for that issue, as wanted by > > >>> Sylwester: > > >>> https://lkml.org/lkml/2014/12/5/223 > > >>> > > >>> Any comments on this? > > >> > > >> The patch looks OK to me, it would be good though if someone else > > >> has confirmed it fixes the bug. I don't have any clock patches queued > > >> at the moment. Perhaps you could apply it directly, Mike ? > > > > > > I confirm it fixes the boot hang in linux-next (next-20141210) on my > > > exynos5800-peach-pi and exynos5420-arndale-octa. Tested both > > > exynos_defconfig and multi_v7_defconfig. > > > > > > Tested-by: Kevin Hilman > > > > What's the status of this patch? linux-next is still broken for several > > Exynos5 platforms without this fix. > > I believe not only next is broken but also current mainline because > runtime PM for pl330 was merged yesterday... > > The patch received two tested-bys (Kevin's and Javier's) and Sylwester's > ack. > > Mike, could you pick the patch and send it to Linus after rc1? Will do. Regards, Mike > > Best regards, > Krzysztof >