Re: [PATCH] PCI: Add disabling pm async quirk for JMicron chips

[Bjorn Helgaas <bhelgaas@google.com>]

On Fri, Dec 05, 2014 at 02:18:40PM -0500, Alan Stern wrote:
> On Fri, 5 Dec 2014, Chuansheng Liu wrote:
> 
> > Some history from
> > commit e6b7e41cdd8c ("ata: Disabling the async PM for JMicron chip 363/361")
> > ==
> > Since v3.15, the PM feature of async noirq
> > commit 76569faa62c4 ("PM / sleep: Asynchronous threads for resume_noirq") is introduced.
> > 
> > Then Jay hit one system resuming issue that one of the JMicron controller
> > can not be powered up successfully.
> > 
> > His device tree is like below:
> >                  +-1c.4-[02]--+-00.0  JMicron Technology Corp. JMB363 SATA/IDE Controller
> >                  |            \-00.1  JMicron Technology Corp. JMB363 SATA/IDE Controller
> > 
> > After investigation, we found the the Micron chip 363 included
> > one SATA controller(0000:02:00.0) and one PATA controller(0000:02:00.1),
> > these two controllers do not have parent-children relationship,
> > but the PATA controller only can be powered on after the SATA controller
> > has finished the powering on.
> > 
> > If we enabled the async noirq(), then the below error is hit during noirq
> > phase:
> > pata_jmicron 0000:02:00.1: Refused to change power state, currently in D3
> > Here for JMicron chip 363/361, we need forcedly to disable the async method.
> 
> You know, this is exactly why device_pm_wait_for_dev() exists -- so 
> that asynchronous power-management operations can wait for other 
> devices even when there's no parent-child relation.
> 
> You should try to use device_pm_wait_for_dev() instead of disabling 
> async suspend/resume.

Dropping this patch for now, waiting for a response to Alan's suggestion.

Bjorn