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From: Huang Shijie <shijie.huang@intel.com>
To: Brian Norris <computersforpeace@gmail.com>
Cc: Ricard Wanderlof <ricard.wanderlof@axis.com>,
	Richard Weinberger <richard@nod.at>,
	Steve deRosier <derosier@gmail.com>, Josh Wu <josh.wu@atmel.com>,
	"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
	Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>,
	Huang Shijie <shijie8@gmail.com>
Subject: Re: [PATCH] mtd: nand: default bitflip-reporting threshold to 75% of correction strength
Date: Tue, 13 Jan 2015 10:01:54 +0800	[thread overview]
Message-ID: <20150113020154.GA12662@hsj.sh.intel.com> (raw)
In-Reply-To: <1421095889-12717-1-git-send-email-computersforpeace@gmail.com>

On Mon, Jan 12, 2015 at 12:51:29PM -0800, Brian Norris wrote:
> The MTD API reports -EUCLEAN only if the maximum number of bitflips
> found in any ECC block exceeds a certain threshold. This is done to
> avoid excessive -EUCLEAN reports to MTD users, which may induce
> additional scrubbing of data, even when the ECC algorithm in use is
> perfectly capable of handling the bitflips.
> 
> This threshold can be controlled by user-space (via sysfs), to allow
> users to determine what they are willing to tolerate in their
> application. But it still helps to have sane defaults.
> 
> In recent discussion [1], it was pointed out that our default threshold
> is equal to the correction strength. That means that we won't actually
> report any -EUCLEAN (i.e., "bitflips were corrected") errors until there
> are almost too many to handle. It was determined that 3/4 of the
> correction strength is probably a better default.
> 
> [1] http://lists.infradead.org/pipermail/linux-mtd/2015-January/057259.html
> 
> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
> ---
>  drivers/mtd/nand/nand_base.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
> index 816b5c1fd416..3f24b587304f 100644
> --- a/drivers/mtd/nand/nand_base.c
> +++ b/drivers/mtd/nand/nand_base.c
> @@ -4171,7 +4171,7 @@ int nand_scan_tail(struct mtd_info *mtd)
>  	 * properly set.
>  	 */
>  	if (!mtd->bitflip_threshold)
> -		mtd->bitflip_threshold = mtd->ecc_strength;
> +		mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4);
After this patch, we have to change the bitflip_threshold to
ecc_strength manually when we do the mtd_biterrors.ko test.
Anyway, I think this patch makes sense.

>  
>  	/* Check, if we should skip the bad block table scan */
>  	if (chip->options & NAND_SKIP_BBTSCAN)
> -- 
Acked-by: Huang Shijie <shijie.huang@intel.com>

  reply	other threads:[~2015-01-13  2:04 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-08  3:10 NAND ECC capabilities Steve deRosier
2015-01-08  4:17 ` Ezequiel Garcia
2015-01-08  6:22   ` Steve deRosier
     [not found]     ` <0D23F1ECC880A74392D56535BCADD73526C0EA9A@NTXBOIMBX03.micron.com>
2015-01-08 17:09       ` Steve deRosier
2015-01-08 18:57         ` Brian Norris
2015-01-08  8:32 ` Ricard Wanderlof
2015-01-08 16:42   ` Ezequiel Garcia
2015-01-08 17:26     ` Steve deRosier
2015-01-08 19:09     ` Brian Norris
2015-01-08 19:27       ` Ezequiel Garcia
2015-01-12  8:35       ` Josh Wu
2015-01-12 20:51         ` [PATCH] mtd: nand: default bitflip-reporting threshold to 75% of correction strength Brian Norris
2015-01-13  2:01           ` Huang Shijie [this message]
2015-01-13  2:38             ` Brian Norris
2015-01-13  2:56               ` Huang Shijie
2015-01-13 13:25           ` Richard Weinberger
2015-01-13 18:48             ` Brian Norris
2015-01-13 18:51               ` Richard Weinberger
2015-01-13 19:51                 ` Brian Norris
2015-01-17 19:01           ` Boris Brezillon
2015-01-17 19:26             ` Richard Weinberger
2015-01-17 19:42               ` Boris Brezillon
2015-01-17 19:54                 ` Richard Weinberger
2015-01-21  8:22             ` Brian Norris
2015-01-21  8:42               ` Boris Brezillon
2015-02-10 13:50                 ` Boris Brezillon
2015-01-21  7:45           ` Brian Norris
2015-01-08 17:14   ` NAND ECC capabilities Steve deRosier

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