From: Sowmini Varadhan <sowmini.varadhan@oracle.com>
To: sparclinux@vger.kernel.org
Subject: Re: [linux-nics] Solved: Re: ixgbe/linux/sparc perf issues
Date: Tue, 13 Jan 2015 22:00:57 +0000 [thread overview]
Message-ID: <20150113220057.GA19534@oracle.com> (raw)
In-Reply-To: <20150109152118.GA6560@oracle.com>
On (01/13/15 16:58), David Miller wrote:
> From: Sowmini Varadhan <sowmini.varadhan@oracle.com>
> Date: Tue, 13 Jan 2015 10:45:30 -0500
>
> > On (01/13/15 01:08), Tantilov, Emil S wrote:
> >> Relaxed ordering was disabled due to an issue with some chipsets. There
> >> is a comment to that effect when enabling relaxed ordering for reads in
> >> ixgbe_update_tx_dca(). This was done back in 2011, so I'm still trying
> >> to dig through the details.
> >
> > It would be helpful to know exactly which chipsets, so that in
> > those cases, we can set the ->enable_relaxed_ordering in my patch
> > to null (or make this setting specific to CONFIG_SPARC?)
>
> I think they are talking about "system chipsets", ie. relaxed ordering
> doesn't work reliably on this or that AMD/Intel/whatever system
> chipset.
If that's what they have in mind (as opposed to some specific
set of ethernet controller) then we can #ifdef CONFIG_SPARC the
->enable_relaxed_ordering initialization?
--Sowmini
prev parent reply other threads:[~2015-01-13 22:00 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-09 15:21 Solved: Re: ixgbe/linux/sparc perf issues Sowmini Varadhan
2015-01-13 1:08 ` [linux-nics] " Tantilov, Emil S
2015-01-13 1:24 ` Sowmini Varadhan
2015-01-13 15:45 ` Sowmini Varadhan
2015-01-13 21:58 ` David Miller
2015-01-13 22:00 ` Sowmini Varadhan [this message]
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