From mboxrd@z Thu Jan 1 00:00:00 1970 From: Radim =?utf-8?B?S3LEjW3DocWZ?= Subject: Re: [PATCH] KVM: x86: amend APIC lowest priority arbitration Date: Wed, 14 Jan 2015 18:04:08 +0100 Message-ID: <20150114170407.GA1298@potion.brq.redhat.com> References: <1420814246-19033-1-git-send-email-rkrcmar@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: kvm@vger.kernel.org, Paolo Bonzini , Gleb Natapov , Feng Wu To: linux-kernel@vger.kernel.org Return-path: Content-Disposition: inline In-Reply-To: <1420814246-19033-1-git-send-email-rkrcmar@redhat.com> Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org 2015-01-09 15:37+0100, Radim Kr=C4=8Dm=C3=A1=C5=99: > Lowest priority should take the task priority into account. >=20 > SDM 10.6.2.4 Lowest Priority Delivery Mode. > (Too long to quote; second and last paragraphs are relevant.) >=20 > Before this patch, we strived to have the same amount of handled > lowest-priority interrupts on all VCPUs. > This is only a complication, but kept for compatibility. > Real modern Intels can't send lowest priority IPIs and the chipset > directs external ones using processors' TPR. =46alse, new Intels most likely don't consider TPR. Please don't include this patch. > AMD still has rough edges. AMD behaves like its documentation states, > + /* XXX: AMD (2:16.6.2 Lowest Priority Messages and Arbitration) > + * - uses the APR register (which also considers ISR and IRR), > + * - chooses the highest APIC ID when APRs are identical, > + * - and allows a focus processor. but we don't differentiate. (It shouldn't create AMD-specific bugs.)