diff for duplicates of <20150121161313.GI5044@leverpostej> diff --git a/a/1.txt b/N1/1.txt index ec195d0..e3452ab 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -45,25 +45,25 @@ That sounds nice. Any idea if/when that would be likely to happen? > reconciled. > > This patch was originally based on a patch by Allen Martin -> <amartin-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> and the Tegra124 and Tegra114 DTS files. +> <amartin@nvidia.com> and the Tegra124 and Tegra114 DTS files. > -> Signed-off-by: Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org> -> Cc: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> -> Cc: Allen Martin <amartin-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> -> Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> -> Cc: Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> -> Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> -> Cc: Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> -> Cc: Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> -> Cc: Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> -> Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> -> Cc: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> -> Cc: Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org> -> Cc: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> -> Cc: Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> -> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -> Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org -> Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +> Signed-off-by: Paul Walmsley <paul@pwsan.com> +> Cc: Paul Walmsley <pwalmsley@nvidia.com> +> Cc: Allen Martin <amartin@nvidia.com> +> Cc: Rob Herring <robh+dt@kernel.org> +> Cc: Pawel Moll <pawel.moll@arm.com> +> Cc: Mark Rutland <mark.rutland@arm.com> +> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> +> Cc: Kumar Gala <galak@codeaurora.org> +> Cc: Russell King <linux@arm.linux.org.uk> +> Cc: Stephen Warren <swarren@wwwdotorg.org> +> Cc: Thierry Reding <thierry.reding@gmail.com> +> Cc: Catalin Marinas <catalin.marinas@arm.com> +> Cc: Will Deacon <will.deacon@arm.com> +> Cc: Alexandre Courbot <gnurou@gmail.com> +> Cc: devicetree at vger.kernel.org +> Cc: linux-arm-kernel at lists.infradead.org +> Cc: linux-tegra at vger.kernel.org > --- > arch/arm64/boot/dts/Makefile | 1 + > arch/arm64/boot/dts/tegra/Makefile | 3 + @@ -126,7 +126,7 @@ creates a memory node for which the reg entry is too small. > + #address-cells = <2>; > + #size-cells = <2>; > + -> + pcie-controller@0,01003000 { +> + pcie-controller at 0,01003000 { > + compatible = "nvidia,tegra132-pcie", "nvidia,tegra124-pcie"; I couldn't spot "nvidia,tegra132-pcie" in mainline anywhere. Does it @@ -184,7 +184,7 @@ Same here w.r.t. list bracketing. > + phys = <&xusb_padctl TEGRA_XUSB_PADCTL_PCIE>; > + phy-names = "pcie"; > + -> + pci@1,0 { +> + pci at 1,0 { > + device_type = "pci"; > + assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; > + reg = <0x000800 0 0 0 0>; @@ -202,7 +202,7 @@ sub-nodes anywhere? > + nvidia,num-lanes = <2>; > + }; > + -> + pci@2,0 { +> + pci at 2,0 { > + device_type = "pci"; > + assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; > + reg = <0x001000 0 0 0 0>; @@ -221,7 +221,7 @@ Likewise. [...] -> + host1x@0,50000000 { +> + host1x at 0,50000000 { > + compatible = "nvidia,tegra132-host1x", "nvidia,tegra124-host1x", "simple-bus"; Regarding simple-bus, are the sub-nodes usable if this didn't probe as @@ -244,7 +244,7 @@ simple-bus annotation is wrong. > + > + ranges = <0 0x54000000 0 0x54000000 0 0x01000000>; > + -> + dc@0,54200000 { +> + dc at 0,54200000 { > + compatible = "nvidia,tegra132-dc", "nvidia,tegra124-dc"; > + reg = <0x0 0x54200000 0x0 0x00040000>; > + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; @@ -259,7 +259,7 @@ simple-bus annotation is wrong. > + nvidia,head = <0>; > + }; > + -> + dc@0,54240000 { +> + dc at 0,54240000 { > + compatible = "nvidia,tegra132-dc", "nvidia,tegra124-dc"; > + reg = <0x0 0x54240000 0x0 0x00040000>; > + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; @@ -274,7 +274,7 @@ simple-bus annotation is wrong. > + nvidia,head = <1>; > + }; > + -> + hdmi@0,54280000 { +> + hdmi at 0,54280000 { > + compatible = "nvidia,tegra132-hdmi", "nvidia,tegra124-hdmi"; > + reg = <0x0 0x54280000 0x0 0x00040000>; > + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; @@ -286,7 +286,7 @@ simple-bus annotation is wrong. > + status = "disabled"; > + }; > + -> + sor@0,54540000 { +> + sor at 0,54540000 { > + compatible = "nvidia,tegra132-sor", "nvidia,tegra124-sor"; > + reg = <0x0 0x54540000 0x0 0x00040000>; > + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; @@ -300,7 +300,7 @@ simple-bus annotation is wrong. > + status = "disabled"; > + }; > + -> + dpaux: dpaux@0,545c0000 { +> + dpaux: dpaux at 0,545c0000 { > + compatible = "nvidia,tegra132-dpaux", "nvidia,tegra124-dpaux"; > + reg = <0x0 0x545c0000 0x0 0x00040000>; > + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; @@ -316,7 +316,7 @@ simple-bus annotation is wrong. [...] -> + gic: interrupt-controller@0,50041000 { +> + gic: interrupt-controller at 0,50041000 { > + compatible = "arm,cortex-a15-gic"; > + #interrupt-cells = <3>; > + interrupt-controller; @@ -333,7 +333,7 @@ right. [...] -> + ppsb: ppsb@0,60000000 { +> + ppsb: ppsb at 0,60000000 { > + compatible = "simple-bus"; > + reg = <0x0 0x60000000 0x0 0x01000000>; > + #address-cells = <2>; @@ -349,7 +349,7 @@ encode that in the ranges property. [...] -> + ahb_gizmo: ahb-gizmo@0,6000c004 { +> + ahb_gizmo: ahb-gizmo at 0,6000c004 { > + compatible = "nvidia,tegra132-ahb", "nvidia,tegra124-ahb", "nvidia,tegra30-ahb"; > + /* > + * This IP block actually starts at 0x6000c000, @@ -365,7 +365,7 @@ mistake to existing DTBs? [...] -> + apb: apb@0,70000000 { +> + apb: apb at 0,70000000 { > + compatible = "simple-bus"; > + reg = <0x0 0x70000000 0x0 0x01000000>; @@ -376,13 +376,13 @@ only a "simple-bus" > + #size-cells = <2>; > + ranges; > + -> + apbmisc: apbmisc@0,70000800 { +> + apbmisc: apbmisc at 0,70000800 { > + compatible = "nvidia,tegra132-apbmisc", "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc"; > + reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ > + <0x0 0x7000E864 0x0 0x04>; /* Strapping options */ > + }; > + -> + pinmux: pinmux@0,70000868 { +> + pinmux: pinmux at 0,70000868 { > + compatible = "nvidia,tegra132-pinmux", "nvidia,tegra124-pinmux"; > + reg = <0x0 0x70000868 0x0 0x164>, /* Pad control registers */ > + <0x0 0x70003000 0x0 0x434>; /* Mux registers */ @@ -414,7 +414,7 @@ Do these UARTs work with earlycon? It would be nice to have a /chosen/stdout-path (ideally with rate) so as to get output consistently without command line options being required. -> + uarta: serial@0,70006000 { +> + uarta: serial at 0,70006000 { > + compatible = "nvidia,tegra132-uart", "nvidia,tegra124-uart", "nvidia,tegra20-uart"; > + reg = <0x0 0x70006000 0x0 0x40>; > + reg-shift = <2>; @@ -427,7 +427,7 @@ to get output consistently without command line options being required. > + status = "disabled"; > + }; > + -> + uartb: serial@0,70006040 { +> + uartb: serial at 0,70006040 { > + compatible = "nvidia,tegra132-uart", "nvidia,tegra124-uart", "nvidia,tegra20-uart"; > + reg = <0x0 0x70006040 0x0 0x40>; > + reg-shift = <2>; @@ -440,7 +440,7 @@ to get output consistently without command line options being required. > + status = "disabled"; > + }; > + -> + uartc: serial@0,70006200 { +> + uartc: serial at 0,70006200 { > + compatible = "nvidia,tegra132-uart", "nvidia,tegra124-uart", "nvidia,tegra20-uart"; > + reg = <0x0 0x70006200 0x0 0x40>; > + reg-shift = <2>; @@ -453,7 +453,7 @@ to get output consistently without command line options being required. > + status = "disabled"; > + }; > + -> + uartd: serial@0,70006300 { +> + uartd: serial at 0,70006300 { > + compatible = "nvidia,tegra132-uart", "nvidia,tegra124-uart", "nvidia,tegra20-uart"; > + reg = <0x0 0x70006300 0x0 0x40>; > + reg-shift = <2>; @@ -468,7 +468,7 @@ to get output consistently without command line options being required. [...] -> + ahb_a2: ahb@0,7c000000 { +> + ahb_a2: ahb at 0,7c000000 { > + compatible = "simple-bus"; > + reg = <0x0 0x7c000000 0x0 0x02000000>; > + #address-cells = <2>; @@ -483,7 +483,7 @@ Again, this doesn't look right for a plain simple-bus. > + #address-cells = <2>; > + #size-cells = <0>; > + -> + cpu@0 { +> + cpu at 0 { > + device_type = "cpu"; > + compatible = "nvidia,denver", "arm,armv8"; > + reg = <0x0 0x0>; @@ -491,7 +491,7 @@ Again, this doesn't look right for a plain simple-bus. > + cpu-release-addr = <0x0 0x80000008>; > + }; > + -> + cpu@1 { +> + cpu at 1 { > + device_type = "cpu"; > + compatible = "nvidia,denver", "arm,armv8"; > + reg = <0x0 0x1>; diff --git a/a/content_digest b/N1/content_digest index 90946f3..9d442d8 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,24 +1,8 @@ "ref\0alpine.DEB.2.02.1501161139180.9776@utopia.booyaka.com\0" - "ref\0alpine.DEB.2.02.1501161139180.9776-rwI8Ez+7Ko+d5PgPZx9QOdBPR1lH4CV8@public.gmane.org\0" - "From\0Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>\0" - "Subject\0Re: [PATCH] arm64: dts: Add initial device tree support for Tegra132\0" + "From\0mark.rutland@arm.com (Mark Rutland)\0" + "Subject\0[PATCH] arm64: dts: Add initial device tree support for Tegra132\0" "Date\0Wed, 21 Jan 2015 16:13:13 +0000\0" - "To\0Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org>\0" - "Cc\0Catalin Marinas <Catalin.Marinas-5wv7dgnIgG8@public.gmane.org>" - Will Deacon <Will.Deacon-5wv7dgnIgG8@public.gmane.org> - pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Allen Martin <amartin-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> - Pawel Moll <Pawel.Moll-5wv7dgnIgG8@public.gmane.org> - Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> - Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> - Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> - Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> - Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> - Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> - devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> - " linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Hi Paul,\n" @@ -68,25 +52,25 @@ "> reconciled.\n" "> \n" "> This patch was originally based on a patch by Allen Martin\n" - "> <amartin-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> and the Tegra124 and Tegra114 DTS files.\n" + "> <amartin@nvidia.com> and the Tegra124 and Tegra114 DTS files.\n" "> \n" - "> Signed-off-by: Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org>\n" - "> Cc: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" - "> Cc: Allen Martin <amartin-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" - "> Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\n" - "> Cc: Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>\n" - "> Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>\n" - "> Cc: Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>\n" - "> Cc: Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>\n" - "> Cc: Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>\n" - "> Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\n" - "> Cc: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" - "> Cc: Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>\n" - "> Cc: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>\n" - "> Cc: Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" - "> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" - "> Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\n" - "> Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + "> Signed-off-by: Paul Walmsley <paul@pwsan.com>\n" + "> Cc: Paul Walmsley <pwalmsley@nvidia.com>\n" + "> Cc: Allen Martin <amartin@nvidia.com>\n" + "> Cc: Rob Herring <robh+dt@kernel.org>\n" + "> Cc: Pawel Moll <pawel.moll@arm.com>\n" + "> Cc: Mark Rutland <mark.rutland@arm.com>\n" + "> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>\n" + "> Cc: Kumar Gala <galak@codeaurora.org>\n" + "> Cc: Russell King <linux@arm.linux.org.uk>\n" + "> Cc: Stephen Warren <swarren@wwwdotorg.org>\n" + "> Cc: Thierry Reding <thierry.reding@gmail.com>\n" + "> Cc: Catalin Marinas <catalin.marinas@arm.com>\n" + "> Cc: Will Deacon <will.deacon@arm.com>\n" + "> Cc: Alexandre Courbot <gnurou@gmail.com>\n" + "> Cc: devicetree at vger.kernel.org\n" + "> Cc: linux-arm-kernel at lists.infradead.org\n" + "> Cc: linux-tegra at vger.kernel.org\n" "> ---\n" "> arch/arm64/boot/dts/Makefile | 1 +\n" "> arch/arm64/boot/dts/tegra/Makefile | 3 +\n" @@ -149,7 +133,7 @@ "> + #address-cells = <2>;\n" "> + #size-cells = <2>;\n" "> +\n" - "> + pcie-controller@0,01003000 {\n" + "> + pcie-controller at 0,01003000 {\n" "> + compatible = \"nvidia,tegra132-pcie\", \"nvidia,tegra124-pcie\";\n" "\n" "I couldn't spot \"nvidia,tegra132-pcie\" in mainline anywhere. Does it\n" @@ -207,7 +191,7 @@ "> + phys = <&xusb_padctl TEGRA_XUSB_PADCTL_PCIE>;\n" "> + phy-names = \"pcie\";\n" "> +\n" - "> + pci@1,0 {\n" + "> + pci at 1,0 {\n" "> + device_type = \"pci\";\n" "> + assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;\n" "> + reg = <0x000800 0 0 0 0>;\n" @@ -225,7 +209,7 @@ "> + nvidia,num-lanes = <2>;\n" "> + };\n" "> +\n" - "> + pci@2,0 {\n" + "> + pci at 2,0 {\n" "> + device_type = \"pci\";\n" "> + assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;\n" "> + reg = <0x001000 0 0 0 0>;\n" @@ -244,7 +228,7 @@ "\n" "[...]\n" "\n" - "> + host1x@0,50000000 {\n" + "> + host1x at 0,50000000 {\n" "> + compatible = \"nvidia,tegra132-host1x\", \"nvidia,tegra124-host1x\", \"simple-bus\";\n" "\n" "Regarding simple-bus, are the sub-nodes usable if this didn't probe as\n" @@ -267,7 +251,7 @@ "> +\n" "> + ranges = <0 0x54000000 0 0x54000000 0 0x01000000>;\n" "> +\n" - "> + dc@0,54200000 {\n" + "> + dc at 0,54200000 {\n" "> + compatible = \"nvidia,tegra132-dc\", \"nvidia,tegra124-dc\";\n" "> + reg = <0x0 0x54200000 0x0 0x00040000>;\n" "> + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -282,7 +266,7 @@ "> + nvidia,head = <0>;\n" "> + };\n" "> +\n" - "> + dc@0,54240000 {\n" + "> + dc at 0,54240000 {\n" "> + compatible = \"nvidia,tegra132-dc\", \"nvidia,tegra124-dc\";\n" "> + reg = <0x0 0x54240000 0x0 0x00040000>;\n" "> + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -297,7 +281,7 @@ "> + nvidia,head = <1>;\n" "> + };\n" "> +\n" - "> + hdmi@0,54280000 {\n" + "> + hdmi at 0,54280000 {\n" "> + compatible = \"nvidia,tegra132-hdmi\", \"nvidia,tegra124-hdmi\";\n" "> + reg = <0x0 0x54280000 0x0 0x00040000>;\n" "> + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -309,7 +293,7 @@ "> + status = \"disabled\";\n" "> + };\n" "> +\n" - "> + sor@0,54540000 {\n" + "> + sor at 0,54540000 {\n" "> + compatible = \"nvidia,tegra132-sor\", \"nvidia,tegra124-sor\";\n" "> + reg = <0x0 0x54540000 0x0 0x00040000>;\n" "> + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -323,7 +307,7 @@ "> + status = \"disabled\";\n" "> + };\n" "> +\n" - "> + dpaux: dpaux@0,545c0000 {\n" + "> + dpaux: dpaux at 0,545c0000 {\n" "> + compatible = \"nvidia,tegra132-dpaux\", \"nvidia,tegra124-dpaux\";\n" "> + reg = <0x0 0x545c0000 0x0 0x00040000>;\n" "> + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -339,7 +323,7 @@ "\n" "[...]\n" "\n" - "> + gic: interrupt-controller@0,50041000 {\n" + "> + gic: interrupt-controller at 0,50041000 {\n" "> + compatible = \"arm,cortex-a15-gic\";\n" "> + #interrupt-cells = <3>;\n" "> + interrupt-controller;\n" @@ -356,7 +340,7 @@ "\n" "[...]\n" "\n" - "> + ppsb: ppsb@0,60000000 {\n" + "> + ppsb: ppsb at 0,60000000 {\n" "> + compatible = \"simple-bus\";\n" "> + reg = <0x0 0x60000000 0x0 0x01000000>;\n" "> + #address-cells = <2>;\n" @@ -372,7 +356,7 @@ "\n" "[...]\n" "\n" - "> + ahb_gizmo: ahb-gizmo@0,6000c004 {\n" + "> + ahb_gizmo: ahb-gizmo at 0,6000c004 {\n" "> + compatible = \"nvidia,tegra132-ahb\", \"nvidia,tegra124-ahb\", \"nvidia,tegra30-ahb\";\n" "> + /*\n" "> + * This IP block actually starts at 0x6000c000,\n" @@ -388,7 +372,7 @@ "\n" "[...]\n" "\n" - "> + apb: apb@0,70000000 {\n" + "> + apb: apb at 0,70000000 {\n" "> + compatible = \"simple-bus\";\n" "> + reg = <0x0 0x70000000 0x0 0x01000000>;\n" "\n" @@ -399,13 +383,13 @@ "> + #size-cells = <2>;\n" "> + ranges;\n" "> +\n" - "> + apbmisc: apbmisc@0,70000800 {\n" + "> + apbmisc: apbmisc at 0,70000800 {\n" "> + compatible = \"nvidia,tegra132-apbmisc\", \"nvidia,tegra124-apbmisc\", \"nvidia,tegra20-apbmisc\";\n" "> + reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */\n" "> + <0x0 0x7000E864 0x0 0x04>; /* Strapping options */\n" "> + };\n" "> +\n" - "> + pinmux: pinmux@0,70000868 {\n" + "> + pinmux: pinmux at 0,70000868 {\n" "> + compatible = \"nvidia,tegra132-pinmux\", \"nvidia,tegra124-pinmux\";\n" "> + reg = <0x0 0x70000868 0x0 0x164>, /* Pad control registers */\n" "> + <0x0 0x70003000 0x0 0x434>; /* Mux registers */\n" @@ -437,7 +421,7 @@ "It would be nice to have a /chosen/stdout-path (ideally with rate) so as\n" "to get output consistently without command line options being required.\n" "\n" - "> + uarta: serial@0,70006000 {\n" + "> + uarta: serial at 0,70006000 {\n" "> + compatible = \"nvidia,tegra132-uart\", \"nvidia,tegra124-uart\", \"nvidia,tegra20-uart\";\n" "> + reg = <0x0 0x70006000 0x0 0x40>;\n" "> + reg-shift = <2>;\n" @@ -450,7 +434,7 @@ "> + status = \"disabled\";\n" "> + };\n" "> +\n" - "> + uartb: serial@0,70006040 {\n" + "> + uartb: serial at 0,70006040 {\n" "> + compatible = \"nvidia,tegra132-uart\", \"nvidia,tegra124-uart\", \"nvidia,tegra20-uart\";\n" "> + reg = <0x0 0x70006040 0x0 0x40>;\n" "> + reg-shift = <2>;\n" @@ -463,7 +447,7 @@ "> + status = \"disabled\";\n" "> + };\n" "> +\n" - "> + uartc: serial@0,70006200 {\n" + "> + uartc: serial at 0,70006200 {\n" "> + compatible = \"nvidia,tegra132-uart\", \"nvidia,tegra124-uart\", \"nvidia,tegra20-uart\";\n" "> + reg = <0x0 0x70006200 0x0 0x40>;\n" "> + reg-shift = <2>;\n" @@ -476,7 +460,7 @@ "> + status = \"disabled\";\n" "> + };\n" "> +\n" - "> + uartd: serial@0,70006300 {\n" + "> + uartd: serial at 0,70006300 {\n" "> + compatible = \"nvidia,tegra132-uart\", \"nvidia,tegra124-uart\", \"nvidia,tegra20-uart\";\n" "> + reg = <0x0 0x70006300 0x0 0x40>;\n" "> + reg-shift = <2>;\n" @@ -491,7 +475,7 @@ "\n" "[...]\n" "\n" - "> + ahb_a2: ahb@0,7c000000 {\n" + "> + ahb_a2: ahb at 0,7c000000 {\n" "> + compatible = \"simple-bus\";\n" "> + reg = <0x0 0x7c000000 0x0 0x02000000>;\n" "> + #address-cells = <2>;\n" @@ -506,7 +490,7 @@ "> + #address-cells = <2>;\n" "> + #size-cells = <0>;\n" "> +\n" - "> + cpu@0 {\n" + "> + cpu at 0 {\n" "> + device_type = \"cpu\";\n" "> + compatible = \"nvidia,denver\", \"arm,armv8\";\n" "> + reg = <0x0 0x0>;\n" @@ -514,7 +498,7 @@ "> + cpu-release-addr = <0x0 0x80000008>;\n" "> + };\n" "> +\n" - "> + cpu@1 {\n" + "> + cpu at 1 {\n" "> + device_type = \"cpu\";\n" "> + compatible = \"nvidia,denver\", \"arm,armv8\";\n" "> + reg = <0x0 0x1>;\n" @@ -576,4 +560,4 @@ "\n" [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-January/317010.html -d0256c07ffc0d87c07c61f561a0579ad0c940f4e6465bb27fc824dd039b8f127 +6a4cea4bd3705d2c863a943195318e71836890bf7484f9ac2783e0e9ada39511
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