From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paul Walmsley Subject: [PATCH 03/24] Documentation: DT bindings: add more chip compatible strings for Tegra SOR Date: Wed, 28 Jan 2015 16:49:37 -0700 Message-ID: <20150128234937.20644.39714.stgit@dusk.lan> References: <20150128234935.20644.89300.stgit@dusk.lan> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20150128234935.20644.89300.stgit@dusk.lan> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Cc: Mark Rutland , Alexandre Courbot , Terje =?utf-8?q?Bergstr=C3=B6m?= , Pawel Moll , Stephen Warren , Ian Campbell , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, Rob Herring , Kumar Gala , linux-tegra@vger.kernel.org List-Id: linux-tegra@vger.kernel.org CkFkZCBjb21wYXRpYmxlIHN0cmluZ3MgZm9yIHRoZSBTT1IgSVAgYmxvY2tzIHByZXNlbnQgb24g c2V2ZXJhbCBUZWdyYQpjaGlwcy4gIFRoZSBwcmltYXJ5IG9iamVjdGl2ZSBoZXJlIGlzIHRvIGF2 b2lkIGNoZWNrcGF0Y2ggd2FybmluZ3MsCnBlcjoKCmh0dHA6Ly9tYXJjLmluZm8vP2w9bGludXgt dGVncmEmbT0xNDIyMDEzNDk3Mjc4MzYmdz0yCgpTaWduZWQtb2ZmLWJ5OiBQYXVsIFdhbG1zbGV5 IDxwYXVsQHB3c2FuLmNvbT4KQ2M6IFRoaWVycnkgUmVkaW5nIDx0aGllcnJ5LnJlZGluZ0BnbWFp bC5jb20+CkNjOiAiVGVyamUgQmVyZ3N0csO2bSIgPHRiZXJnc3Ryb21AbnZpZGlhLmNvbT4KQ2M6 IFJvYiBIZXJyaW5nIDxyb2JoK2R0QGtlcm5lbC5vcmc+CkNjOiBQYXdlbCBNb2xsIDxwYXdlbC5t b2xsQGFybS5jb20+CkNjOiBNYXJrIFJ1dGxhbmQgPG1hcmsucnV0bGFuZEBhcm0uY29tPgpDYzog SWFuIENhbXBiZWxsIDxpamMrZGV2aWNldHJlZUBoZWxsaW9uLm9yZy51az4KQ2M6IEt1bWFyIEdh bGEgPGdhbGFrQGNvZGVhdXJvcmEub3JnPgpDYzogU3RlcGhlbiBXYXJyZW4gPHN3YXJyZW5Ad3d3 ZG90b3JnLm9yZz4KQ2M6IEFsZXhhbmRyZSBDb3VyYm90IDxnbnVyb3VAZ21haWwuY29tPgpDYzog ZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpDYzogbGludXgtdGVncmFAdmdlci5rZXJu ZWwub3JnCkNjOiBkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZwpDYzogbGludXgta2VybmVsQHZn ZXIua2VybmVsLm9yZwotLS0KIC4uLi9iaW5kaW5ncy9ncHUvbnZpZGlhLHRlZ3JhMjAtaG9zdDF4 LnR4dCAgICAgICAgIHwgICAgMiArKwogMSBmaWxlIGNoYW5nZWQsIDIgaW5zZXJ0aW9ucygrKQoK ZGlmZiAtLWdpdCBhL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9ncHUvbnZpZGlh LHRlZ3JhMjAtaG9zdDF4LnR4dCBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9n cHUvbnZpZGlhLHRlZ3JhMjAtaG9zdDF4LnR4dAppbmRleCA0YzMyZWYwYjdkYjguLjBlODI4YzAw ZTdlNCAxMDA2NDQKLS0tIGEvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL2dwdS9u dmlkaWEsdGVncmEyMC1ob3N0MXgudHh0CisrKyBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9i aW5kaW5ncy9ncHUvbnZpZGlhLHRlZ3JhMjAtaG9zdDF4LnR4dApAQCAtMTk4LDYgKzE5OCw3IEBA IG9mIHRoZSBmb2xsb3dpbmcgaG9zdDF4IGNsaWVudCBtb2R1bGVzOgogCiAgIFJlcXVpcmVkIHBy b3BlcnRpZXM6CiAgIC0gY29tcGF0aWJsZTogIm52aWRpYSx0ZWdyYTEyNC1zb3IiCisgICAgIm52 aWRpYSx0ZWdyYTEzMi1zb3IiIChub3QgeWV0IG1hdGNoZWQgaW4gdGhlIGRyaXZlcikKICAgLSBy ZWc6IFBoeXNpY2FsIGJhc2UgYWRkcmVzcyBhbmQgbGVuZ3RoIG9mIHRoZSBjb250cm9sbGVyJ3Mg cmVnaXN0ZXJzLgogICAtIGludGVycnVwdHM6IFRoZSBpbnRlcnJ1cHQgb3V0cHV0cyBmcm9tIHRo ZSBjb250cm9sbGVyLgogICAtIGNsb2NrczogTXVzdCBjb250YWluIGFuIGVudHJ5IGZvciBlYWNo IGVudHJ5IGluIGNsb2NrLW5hbWVzLgpAQCAtMjIzLDYgKzIyNCw3IEBAIG9mIHRoZSBmb2xsb3dp bmcgaG9zdDF4IGNsaWVudCBtb2R1bGVzOgogCiAtIGRwYXV4OiBEaXNwbGF5UG9ydCBBVVggaW50 ZXJmYWNlCiAgIC0gY29tcGF0aWJsZTogIm52aWRpYSx0ZWdyYTEyNC1kcGF1eCIKKyAgICAibnZp ZGlhLHRlZ3JhMTMyLWRwYXV4IiAobm90IHlldCBtYXRjaGVkIGluIHRoZSBkcml2ZXIpCiAgIC0g cmVnOiBQaHlzaWNhbCBiYXNlIGFkZHJlc3MgYW5kIGxlbmd0aCBvZiB0aGUgY29udHJvbGxlcidz IHJlZ2lzdGVycy4KICAgLSBpbnRlcnJ1cHRzOiBUaGUgaW50ZXJydXB0IG91dHB1dHMgZnJvbSB0 aGUgY29udHJvbGxlci4KICAgLSBjbG9ja3M6IE11c3QgY29udGFpbiBhbiBlbnRyeSBmb3IgZWFj aCBlbnRyeSBpbiBjbG9jay1uYW1lcy4KCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5m cmVlZGVza3RvcC5vcmcKaHR0cDovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3Rp bmZvL2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756832AbbA2Blu (ORCPT ); Wed, 28 Jan 2015 20:41:50 -0500 Received: from utopia.booyaka.com ([74.50.51.50]:59354 "EHLO utopia.booyaka.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756802AbbA2Blr (ORCPT ); Wed, 28 Jan 2015 20:41:47 -0500 MBOX-Line: From nobody Wed Jan 28 16:49:37 2015 Subject: [PATCH 03/24] Documentation: DT bindings: add more chip compatible strings for Tegra SOR From: Paul Walmsley Cc: Mark Rutland , Alexandre Courbot , Terje =?utf-8?q?Bergstr=C3=B6m?= , Pawel Moll , Ian Campbell , Stephen Warren , linux-kernel@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, Thierry Reding , dri-devel@lists.freedesktop.org, Kumar Gala , linux-tegra@vger.kernel.org Date: Wed, 28 Jan 2015 16:49:37 -0700 Message-ID: <20150128234937.20644.39714.stgit@dusk.lan> In-Reply-To: <20150128234935.20644.89300.stgit@dusk.lan> References: <20150128234935.20644.89300.stgit@dusk.lan> User-Agent: StGit/0.16-37-g27ac3 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: unlisted-recipients:; (no To-header on input) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add compatible strings for the SOR IP blocks present on several Tegra chips. The primary objective here is to avoid checkpatch warnings, per: http://marc.info/?l=linux-tegra&m=142201349727836&w=2 Signed-off-by: Paul Walmsley Cc: Thierry Reding Cc: "Terje Bergström" Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Stephen Warren Cc: Alexandre Courbot Cc: dri-devel@lists.freedesktop.org Cc: linux-tegra@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- .../bindings/gpu/nvidia,tegra20-host1x.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt index 4c32ef0b7db8..0e828c00e7e4 100644 --- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt +++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt @@ -198,6 +198,7 @@ of the following host1x client modules: Required properties: - compatible: "nvidia,tegra124-sor" + "nvidia,tegra132-sor" (not yet matched in the driver) - reg: Physical base address and length of the controller's registers. - interrupts: The interrupt outputs from the controller. - clocks: Must contain an entry for each entry in clock-names. @@ -223,6 +224,7 @@ of the following host1x client modules: - dpaux: DisplayPort AUX interface - compatible: "nvidia,tegra124-dpaux" + "nvidia,tegra132-dpaux" (not yet matched in the driver) - reg: Physical base address and length of the controller's registers. - interrupts: The interrupt outputs from the controller. - clocks: Must contain an entry for each entry in clock-names.