diff for duplicates of <20150206203949.GJ2079@lukather> diff --git a/a/1.txt b/N1/1.txt index ae47491..4f353ed 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -106,7 +106,7 @@ On Fri, Feb 06, 2015 at 04:57:55PM +0100, Thomas Petazzoni wrote: > +/ { > + soc { > + internal-regs { -> + pinctrl@18000 { +> + pinctrl at 18000 { > + compatible = "marvell,mv88f6920-pinctrl"; > + reg = <0x18000 0x20>; > + }; @@ -190,7 +190,7 @@ board/SoC options. > + MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; > + > + internal-regs { -> + i2c@11000 { +> + i2c at 11000 { > + pinctrl-0 = <&i2c0_pins>; > + pinctrl-names = "default"; > + status = "okay"; @@ -203,19 +203,19 @@ last with spaces. > + }; > + -> + serial@12000 { +> + serial at 12000 { > + pinctrl-0 = <&uart0_pins>; > + pinctrl-names = "default"; > + status = "okay"; > + }; > + -> + serial@12100 { +> + serial at 12100 { > + pinctrl-0 = <&uart1_pins>; > + pinctrl-names = "default"; > + status = "okay"; > + }; > + -> + pinctrl@18000 { +> + pinctrl at 18000 { > + uart0_pins: uart0-pins { > + marvell,pins = "mpp0", "mpp1"; > + marvell,function = "ua0"; @@ -235,15 +235,15 @@ in the SoC DTSI? > + pcie-controller { > + status = "okay"; > + -> + pcie@1,0 { +> + pcie at 1,0 { > + status = "okay"; > + }; > + -> + pcie@2,0 { +> + pcie at 2,0 { > + status = "okay"; > + }; > + -> + pcie@3,0 { +> + pcie at 3,0 { > + status = "okay"; > + }; > + }; @@ -308,7 +308,7 @@ in the SoC DTSI? > + > + soc { > + internal-regs { -> + pinctrl@18000 { +> + pinctrl at 18000 { > + compatible = "marvell,mv88f6928-pinctrl"; > + reg = <0x18000 0x20>; > + }; @@ -382,12 +382,12 @@ in the SoC DTSI? > + #size-cells = <0>; > + enable-method = "marvell,armada-390-smp"; > + -> + cpu@0 { +> + cpu at 0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <0>; > + }; -> + cpu@1 { +> + cpu at 1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a9"; > + reg = <1>; @@ -415,19 +415,19 @@ in the SoC DTSI? > + #size-cells = <1>; > + ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>; > + -> + scu@c000 { +> + scu at c000 { > + compatible = "arm,cortex-a9-scu"; > + reg = <0xc000 0x100>; > + }; > + -> + timer@c600 { +> + timer at c600 { > + compatible = "arm,cortex-a9-twd-timer"; > + reg = <0xc600 0x20>; > + interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>; > + clocks = <&coreclk 2>; > + }; > + -> + gic: interrupt-controller@d000 { +> + gic: interrupt-controller at d000 { > + compatible = "arm,cortex-a9-gic"; > + #interrupt-cells = <3>; > + #size-cells = <0>; @@ -436,7 +436,7 @@ in the SoC DTSI? > + <0xc100 0x100>; > + }; > + -> + i2c0: i2c@11000 { +> + i2c0: i2c at 11000 { > + compatible = "marvell,mv64xxx-i2c"; > + reg = <0x11000 0x20>; > + #address-cells = <1>; @@ -447,7 +447,7 @@ in the SoC DTSI? > + status = "disabled"; > + }; > + -> + i2c1: i2c@11100 { +> + i2c1: i2c at 11100 { > + compatible = "marvell,mv64xxx-i2c"; > + reg = <0x11100 0x20>; > + #address-cells = <1>; @@ -458,7 +458,7 @@ in the SoC DTSI? > + status = "disabled"; > + }; > + -> + i2c2: i2c@11200 { +> + i2c2: i2c at 11200 { > + compatible = "marvell,mv64xxx-i2c"; > + reg = <0x11200 0x20>; > + #address-cells = <1>; @@ -469,7 +469,7 @@ in the SoC DTSI? > + status = "disabled"; > + }; > + -> + i2c3: i2c@11300 { +> + i2c3: i2c at 11300 { > + compatible = "marvell,mv64xxx-i2c"; > + reg = <0x11300 0x20>; > + #address-cells = <1>; @@ -480,7 +480,7 @@ in the SoC DTSI? > + status = "disabled"; > + }; > + -> + serial@12000 { +> + serial at 12000 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x12000 0x100>; > + reg-shift = <2>; @@ -490,7 +490,7 @@ in the SoC DTSI? > + status = "disabled"; > + }; > + -> + serial@12100 { +> + serial at 12100 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x12100 0x100>; > + reg-shift = <2>; @@ -500,7 +500,7 @@ in the SoC DTSI? > + status = "disabled"; > + }; > + -> + serial@12200 { +> + serial at 12200 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x12200 0x100>; > + reg-shift = <2>; @@ -510,7 +510,7 @@ in the SoC DTSI? > + status = "disabled"; > + }; > + -> + serial@12300 { +> + serial at 12300 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x12300 0x100>; > + reg-shift = <2>; @@ -520,38 +520,38 @@ in the SoC DTSI? > + status = "disabled"; > + }; > + -> + pinctrl@18000 { +> + pinctrl at 18000 { > + i2c0_pins: i2c0-pins { > + marvell,pins = "mpp2", "mpp3"; > + marvell,function = "i2c0"; > + }; > + }; > + -> + system-controller@18200 { +> + system-controller at 18200 { > + compatible = "marvell,armada-390-system-controller", > + "marvell,armada-370-xp-system-controller"; > + reg = <0x18200 0x100>; > + }; > + -> + gateclk: clock-gating-control@18220 { +> + gateclk: clock-gating-control at 18220 { > + compatible = "marvell,armada-390-gating-clock"; > + reg = <0x18220 0x4>; > + clocks = <&coreclk 0>; > + #clock-cells = <1>; > + }; > + -> + coreclk: mvebu-sar@18600 { +> + coreclk: mvebu-sar at 18600 { > + compatible = "marvell,armada-390-core-clock"; > + reg = <0x18600 0x04>; > + #clock-cells = <1>; > + }; > + -> + mbusc: mbus-controller@20000 { +> + mbusc: mbus-controller at 20000 { > + compatible = "marvell,mbus-controller"; > + reg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x8>; > + }; > + -> + mpic: interrupt-controller@20000 { +> + mpic: interrupt-controller at 20000 { The unit-address doesn't match the reg address. @@ -564,7 +564,7 @@ The unit-address doesn't match the reg address. > + interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>; > + }; > + -> + timer@20300 { +> + timer at 20300 { > + compatible = "marvell,armada-380-timer", > + "marvell,armada-xp-timer"; > + reg = <0x20300 0x30>, <0x21040 0x30>; @@ -578,12 +578,12 @@ The unit-address doesn't match the reg address. > + clock-names = "nbclk", "fixed"; > + }; > + -> + cpurst@20800 { +> + cpurst at 20800 { > + compatible = "marvell,armada-370-cpu-reset"; > + reg = <0x20800 0x10>; > + }; > + -> + pmsu@22000 { +> + pmsu at 22000 { > + compatible = "marvell,armada-390-pmsu", > + "marvell,armada-380-pmsu"; > + reg = <0x22000 0x1000>; @@ -618,9 +618,9 @@ The unit-address doesn't match the reg address. > + /* > + * This port can be either x4 or x1. When > + * configured in x4 by the bootloader, then -> + * pcie@4,0 is not available. +> + * pcie at 4,0 is not available. > + */ -> + pcie@1,0 { +> + pcie at 1,0 { > + device_type = "pci"; > + assigned-addresses = <0x82000800 0 0x80000 0 0x2000>; > + reg = <0x0800 0 0 0 0>; @@ -638,7 +638,7 @@ The unit-address doesn't match the reg address. > + }; > + > + /* x1 port */ -> + pcie@2,0 { +> + pcie at 2,0 { > + device_type = "pci"; > + assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; > + reg = <0x1000 0 0 0 0>; @@ -656,7 +656,7 @@ The unit-address doesn't match the reg address. > + }; > + > + /* x1 port */ -> + pcie@3,0 { +> + pcie at 3,0 { > + device_type = "pci"; > + assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; > + reg = <0x1800 0 0 0 0>; @@ -674,10 +674,10 @@ The unit-address doesn't match the reg address. > + }; > + > + /* -> + * x1 port only available when pcie@1,0 is +> + * x1 port only available when pcie at 1,0 is > + * configured as a x1 port > + */ -> + pcie@4,0 { +> + pcie at 4,0 { > + device_type = "pci"; > + assigned-addresses = <0x82000800 0 0x48000 0 0x2000>; > + reg = <0x2000 0 0 0 0>; @@ -707,3 +707,10 @@ Maxime Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com +-------------- next part -------------- +A non-text attachment was scrubbed... +Name: signature.asc +Type: application/pgp-signature +Size: 819 bytes +Desc: Digital signature +URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150206/63783d8a/attachment-0001.sig> diff --git a/a/2.bin b/a/2.bin deleted file mode 100644 index 42b04e6..0000000 --- a/a/2.bin +++ /dev/null @@ -1,17 +0,0 @@ ------BEGIN PGP SIGNATURE----- -Version: GnuPG v1 - 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"From\0Maxime Ripard <maxime.ripard@free-electrons.com>\0" - "Subject\0Re: [PATCH 09/10] ARM: mvebu: add Device Tree files for Armada 39x SoC and board\0" + "From\0maxime.ripard@free-electrons.com (Maxime Ripard)\0" + "Subject\0[PATCH 09/10] ARM: mvebu: add Device Tree files for Armada 39x SoC and board\0" "Date\0Fri, 6 Feb 2015 21:39:49 +0100\0" - "To\0Thomas Petazzoni <thomas.petazzoni@free-electrons.com>\0" - "Cc\0Jason Cooper <jason@lakedaemon.net>" - Andrew Lunn <andrew@lunn.ch> - Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> - Gregory Clement <gregory.clement@free-electrons.com> - devicetree@vger.kernel.org - Rob Herring <robh+dt@kernel.org> - Pawel Moll <pawel.moll@arm.com> - Mark Rutland <mark.rutland@arm.com> - Ian Campbell <ijc+devicetree@hellion.org.uk> - Kumar Gala <galak@codeaurora.org> - Mike Turquette <mturquette@linaro.org> - Stephen Boyd <sboyd@codeaurora.org> - Linus Walleij <linus.walleij@linaro.org> - linux-arm-kernel@lists.infradead.org - linux-gpio@vger.kernel.org - Tawfik Bayouk <tawfik@marvell.com> - Nadav Haklai <nadavh@marvell.com> - Lior Amsalem <alior@marvell.com> - " Ezequiel Garcia <ezequiel.garcia@free-electrons.com>\0" - "\01:1\0" + "To\0linux-arm-kernel@lists.infradead.org\0" + "\00:1\0" "b\0" "On Fri, Feb 06, 2015 at 04:57:55PM +0100, Thomas Petazzoni wrote:\n" "> This commit adds the Device Tree files for the Armada 39x family of\n" @@ -133,7 +114,7 @@ "> +/ {\n" "> +\tsoc {\n" "> +\t\tinternal-regs {\n" - "> +\t\t\tpinctrl@18000 {\n" + "> +\t\t\tpinctrl at 18000 {\n" "> +\t\t\t\tcompatible = \"marvell,mv88f6920-pinctrl\";\n" "> +\t\t\t\treg = <0x18000 0x20>;\n" "> +\t\t\t};\n" @@ -217,7 +198,7 @@ "> +\t\t\t MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;\n" "> +\n" "> +\t\tinternal-regs {\n" - "> + i2c@11000 {\n" + "> + i2c at 11000 {\n" "> +\t\t\t\tpinctrl-0 = <&i2c0_pins>;\n" "> +\t\t\t\tpinctrl-names = \"default\";\n" "> + status = \"okay\";\n" @@ -230,19 +211,19 @@ "\n" "> + };\n" "> +\n" - "> +\t\t\tserial@12000 {\n" + "> +\t\t\tserial at 12000 {\n" "> +\t\t\t\tpinctrl-0 = <&uart0_pins>;\n" "> +\t\t\t\tpinctrl-names = \"default\";\n" "> +\t\t\t\tstatus = \"okay\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tserial@12100 {\n" + "> +\t\t\tserial at 12100 {\n" "> +\t\t\t\tpinctrl-0 = <&uart1_pins>;\n" "> +\t\t\t\tpinctrl-names = \"default\";\n" "> +\t\t\t\tstatus = \"okay\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tpinctrl@18000 {\n" + "> +\t\t\tpinctrl at 18000 {\n" "> +\t\t\t\tuart0_pins: uart0-pins {\n" "> +\t\t\t\t\tmarvell,pins = \"mpp0\", \"mpp1\";\n" "> +\t\t\t\t\tmarvell,function = \"ua0\";\n" @@ -262,15 +243,15 @@ "> +\t\tpcie-controller {\n" "> +\t\t\tstatus = \"okay\";\n" "> +\n" - "> +\t\t\tpcie@1,0 {\n" + "> +\t\t\tpcie at 1,0 {\n" "> +\t\t\t\tstatus = \"okay\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tpcie@2,0 {\n" + "> +\t\t\tpcie at 2,0 {\n" "> +\t\t\t\tstatus = \"okay\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tpcie@3,0 {\n" + "> +\t\t\tpcie at 3,0 {\n" "> +\t\t\t\tstatus = \"okay\";\n" "> +\t\t\t};\n" "> +\t\t};\n" @@ -335,7 +316,7 @@ "> +\n" "> +\tsoc {\n" "> +\t\tinternal-regs {\n" - "> +\t\t\tpinctrl@18000 {\n" + "> +\t\t\tpinctrl at 18000 {\n" "> +\t\t\t\tcompatible = \"marvell,mv88f6928-pinctrl\";\n" "> +\t\t\t\treg = <0x18000 0x20>;\n" "> +\t\t\t};\n" @@ -409,12 +390,12 @@ "> +\t\t#size-cells = <0>;\n" "> +\t\tenable-method = \"marvell,armada-390-smp\";\n" "> +\n" - "> +\t\tcpu@0 {\n" + "> +\t\tcpu at 0 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a9\";\n" "> +\t\t\treg = <0>;\n" "> +\t\t};\n" - "> +\t\tcpu@1 {\n" + "> +\t\tcpu at 1 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a9\";\n" "> +\t\t\treg = <1>;\n" @@ -442,19 +423,19 @@ "> +\t\t\t#size-cells = <1>;\n" "> +\t\t\tranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;\n" "> +\n" - "> +\t\t\tscu@c000 {\n" + "> +\t\t\tscu at c000 {\n" "> +\t\t\t\tcompatible = \"arm,cortex-a9-scu\";\n" "> +\t\t\t\treg = <0xc000 0x100>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ttimer@c600 {\n" + "> +\t\t\ttimer at c600 {\n" "> +\t\t\t\tcompatible = \"arm,cortex-a9-twd-timer\";\n" "> +\t\t\t\treg = <0xc600 0x20>;\n" "> +\t\t\t\tinterrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;\n" "> +\t\t\t\tclocks = <&coreclk 2>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgic: interrupt-controller@d000 {\n" + "> +\t\t\tgic: interrupt-controller at d000 {\n" "> +\t\t\t\tcompatible = \"arm,cortex-a9-gic\";\n" "> +\t\t\t\t#interrupt-cells = <3>;\n" "> +\t\t\t\t#size-cells = <0>;\n" @@ -463,7 +444,7 @@ "> +\t\t\t\t <0xc100 0x100>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ti2c0: i2c@11000 {\n" + "> +\t\t\ti2c0: i2c at 11000 {\n" "> +\t\t\t\tcompatible = \"marvell,mv64xxx-i2c\";\n" "> +\t\t\t\treg = <0x11000 0x20>;\n" "> +\t\t\t\t#address-cells = <1>;\n" @@ -474,7 +455,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ti2c1: i2c@11100 {\n" + "> +\t\t\ti2c1: i2c at 11100 {\n" "> +\t\t\t\tcompatible = \"marvell,mv64xxx-i2c\";\n" "> +\t\t\t\treg = <0x11100 0x20>;\n" "> +\t\t\t\t#address-cells = <1>;\n" @@ -485,7 +466,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ti2c2: i2c@11200 {\n" + "> +\t\t\ti2c2: i2c at 11200 {\n" "> +\t\t\t\tcompatible = \"marvell,mv64xxx-i2c\";\n" "> +\t\t\t\treg = <0x11200 0x20>;\n" "> +\t\t\t\t#address-cells = <1>;\n" @@ -496,7 +477,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ti2c3: i2c@11300 {\n" + "> +\t\t\ti2c3: i2c at 11300 {\n" "> +\t\t\t\tcompatible = \"marvell,mv64xxx-i2c\";\n" "> +\t\t\t\treg = <0x11300 0x20>;\n" "> +\t\t\t\t#address-cells = <1>;\n" @@ -507,7 +488,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tserial@12000 {\n" + "> +\t\t\tserial at 12000 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\t\treg = <0x12000 0x100>;\n" "> +\t\t\t\treg-shift = <2>;\n" @@ -517,7 +498,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tserial@12100 {\n" + "> +\t\t\tserial at 12100 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\t\treg = <0x12100 0x100>;\n" "> +\t\t\t\treg-shift = <2>;\n" @@ -527,7 +508,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tserial@12200 {\n" + "> +\t\t\tserial at 12200 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\t\treg = <0x12200 0x100>;\n" "> +\t\t\t\treg-shift = <2>;\n" @@ -537,7 +518,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tserial@12300 {\n" + "> +\t\t\tserial at 12300 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\t\treg = <0x12300 0x100>;\n" "> +\t\t\t\treg-shift = <2>;\n" @@ -547,38 +528,38 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tpinctrl@18000 {\n" + "> +\t\t\tpinctrl at 18000 {\n" "> +\t\t\t\ti2c0_pins: i2c0-pins {\n" "> +\t\t\t\t\tmarvell,pins = \"mpp2\", \"mpp3\";\n" "> +\t\t\t\t\tmarvell,function = \"i2c0\";\n" "> +\t\t\t\t};\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tsystem-controller@18200 {\n" + "> +\t\t\tsystem-controller at 18200 {\n" "> +\t\t\t\tcompatible = \"marvell,armada-390-system-controller\",\n" "> +\t\t\t\t\t \"marvell,armada-370-xp-system-controller\";\n" "> +\t\t\t\treg = <0x18200 0x100>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgateclk: clock-gating-control@18220 {\n" + "> +\t\t\tgateclk: clock-gating-control at 18220 {\n" "> +\t\t\t\tcompatible = \"marvell,armada-390-gating-clock\";\n" "> +\t\t\t\treg = <0x18220 0x4>;\n" "> +\t\t\t\tclocks = <&coreclk 0>;\n" "> +\t\t\t\t#clock-cells = <1>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tcoreclk: mvebu-sar@18600 {\n" + "> +\t\t\tcoreclk: mvebu-sar at 18600 {\n" "> +\t\t\t\tcompatible = \"marvell,armada-390-core-clock\";\n" "> +\t\t\t\treg = <0x18600 0x04>;\n" "> +\t\t\t\t#clock-cells = <1>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tmbusc: mbus-controller@20000 {\n" + "> +\t\t\tmbusc: mbus-controller at 20000 {\n" "> +\t\t\t\tcompatible = \"marvell,mbus-controller\";\n" "> +\t\t\t\treg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x8>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tmpic: interrupt-controller@20000 {\n" + "> +\t\t\tmpic: interrupt-controller at 20000 {\n" "\n" "The unit-address doesn't match the reg address.\n" "\n" @@ -591,7 +572,7 @@ "> +\t\t\t\tinterrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ttimer@20300 {\n" + "> +\t\t\ttimer at 20300 {\n" "> +\t\t\t\tcompatible = \"marvell,armada-380-timer\",\n" "> +\t\t\t\t\t \"marvell,armada-xp-timer\";\n" "> +\t\t\t\treg = <0x20300 0x30>, <0x21040 0x30>;\n" @@ -605,12 +586,12 @@ "> +\t\t\t\tclock-names = \"nbclk\", \"fixed\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tcpurst@20800 {\n" + "> +\t\t\tcpurst at 20800 {\n" "> +\t\t\t\tcompatible = \"marvell,armada-370-cpu-reset\";\n" "> +\t\t\t\treg = <0x20800 0x10>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tpmsu@22000 {\n" + "> +\t\t\tpmsu at 22000 {\n" "> +\t\t\t\tcompatible = \"marvell,armada-390-pmsu\",\n" "> +\t\t\t\t\t \"marvell,armada-380-pmsu\";\n" "> +\t\t\t\treg = <0x22000 0x1000>;\n" @@ -645,9 +626,9 @@ "> +\t\t\t/*\n" "> +\t\t\t * This port can be either x4 or x1. When\n" "> +\t\t\t * configured in x4 by the bootloader, then\n" - "> +\t\t\t * pcie@4,0 is not available.\n" + "> +\t\t\t * pcie at 4,0 is not available.\n" "> +\t\t\t */\n" - "> +\t\t\tpcie@1,0 {\n" + "> +\t\t\tpcie at 1,0 {\n" "> +\t\t\t\tdevice_type = \"pci\";\n" "> +\t\t\t\tassigned-addresses = <0x82000800 0 0x80000 0 0x2000>;\n" "> +\t\t\t\treg = <0x0800 0 0 0 0>;\n" @@ -665,7 +646,7 @@ "> +\t\t\t};\n" "> +\n" "> +\t\t\t/* x1 port */\n" - "> +\t\t\tpcie@2,0 {\n" + "> +\t\t\tpcie at 2,0 {\n" "> +\t\t\t\tdevice_type = \"pci\";\n" "> +\t\t\t\tassigned-addresses = <0x82000800 0 0x40000 0 0x2000>;\n" "> +\t\t\t\treg = <0x1000 0 0 0 0>;\n" @@ -683,7 +664,7 @@ "> +\t\t\t};\n" "> +\n" "> +\t\t\t/* x1 port */\n" - "> +\t\t\tpcie@3,0 {\n" + "> +\t\t\tpcie at 3,0 {\n" "> +\t\t\t\tdevice_type = \"pci\";\n" "> +\t\t\t\tassigned-addresses = <0x82000800 0 0x44000 0 0x2000>;\n" "> +\t\t\t\treg = <0x1800 0 0 0 0>;\n" @@ -701,10 +682,10 @@ "> +\t\t\t};\n" "> +\n" "> +\t\t\t/*\n" - "> +\t\t\t * x1 port only available when pcie@1,0 is\n" + "> +\t\t\t * x1 port only available when pcie at 1,0 is\n" "> +\t\t\t * configured as a x1 port\n" "> +\t\t\t */\n" - "> +\t\t\tpcie@4,0 {\n" + "> +\t\t\tpcie at 4,0 {\n" "> +\t\t\t\tdevice_type = \"pci\";\n" "> +\t\t\t\tassigned-addresses = <0x82000800 0 0x48000 0 0x2000>;\n" "> +\t\t\t\treg = <0x2000 0 0 0 0>;\n" @@ -733,27 +714,13 @@ "-- \n" "Maxime Ripard, Free Electrons\n" "Embedded Linux, Kernel and Android engineering\n" - http://free-electrons.com - "\01:2\0" - "fn\0signature.asc\0" - "d\0Digital signature\0" - "b\0" - "-----BEGIN PGP SIGNATURE-----\n" - "Version: GnuPG v1\n" - "\n" - "iQIcBAEBAgAGBQJU1SaVAAoJEBx+YmzsjxAgCkkP/jVauwy5BncV9RQwnI8LQ2h2\n" - "KM+0hZpAw5QkOBDJMocCgEyTFmJbkQFGtMEhWe4xVoRkGfkZWFBgmuUUQk95rDqb\n" - "Tr+wX7EvfgtzC92gJeYfSSWtNDvresH4qE62pGVYoLzev8FDTo1bQu/GiUAq57gl\n" - "8owq8n5OajOLoiwLySbBJNrIJ97a/z8PgK0eo3JZSXLMtTN2NsdxcFKtengNrzCl\n" - "VezAeQmDv4IhEJobuZBdN49BxiIC+zV9KnNDg3TLPWmqcj39SN3lkPIIE8R0I1Rk\n" - "siDKYDQHaRBN+2axJwEs8iYZSg3Xqwbw5z9uft1fLvSvY/siryuawcrZfZ2gkJKo\n" - "TUGXHdLAdDcZV+kZTOmWcb0JP7s62ycmi8eIjZrlXdpjGOZFJdrYOUQmeKcF2pJq\n" - "4WVYWiAJg3eDnqq4Xv0u6/BANEeRDO5zhCoaYoan3HCIYGu5BVe8FSUvasHa8/YB\n" - "OQWC6WWy+u0Q1dp02aGLCBzwnti1zPMr7GtcAnFPxbXBQhL6mLNng+Q6l4DuDAY4\n" - "7g0sIbdK1gvezIQ8CXwtg2GVayMEwaKKteXAsb8fr621ybJaBfZgdz6RBixWwIrV\n" - "f8avswleWcMnWZsT62d4B0QyumYeNNwrMs+d4hzobg7uvNNVhUUDj8QgxCSNMMpJ\n" - "EJ7ztxpEfArzjTUztL7J\n" - "=A4bL\n" - "-----END PGP SIGNATURE-----\n" + "http://free-electrons.com\n" + "-------------- next part --------------\n" + "A non-text attachment was scrubbed...\n" + "Name: signature.asc\n" + "Type: application/pgp-signature\n" + "Size: 819 bytes\n" + "Desc: Digital signature\n" + URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150206/63783d8a/attachment-0001.sig> -ccf9ac6d134cb8e8d73c69a91b1ba0f71a076b8ca9f30f85be93e02914744059 +6bfb879f21b749eb49508e2a85754479e6a144b04be486742155c659634ec140
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