All of lore.kernel.org
 help / color / mirror / Atom feed
From: Marc Zyngier <marc.zyngier@arm.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v4 04/14] ARM: Factor out reusable psci_cpu_entry
Date: Sat, 28 Feb 2015 13:53:12 +0000	[thread overview]
Message-ID: <20150228135312.0d493843@arm.com> (raw)
In-Reply-To: <5e62f5242de46bee80f6b12999125a296443a45d.1425043693.git.jan.kiszka@siemens.com>

On Fri, 27 Feb 2015 13:28:03 +0000
Jan Kiszka <jan.kiszka@siemens.com> wrote:

> _sunxi_cpu_entry can be converted completely into a reusable
> psci_cpu_entry. Tegra124 will use it as well.
> 
> CC: Marc Zyngier <marc.zyngier@arm.com>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
>  arch/arm/cpu/armv7/psci.S       | 18 ++++++++++++++++++
>  arch/arm/cpu/armv7/sunxi/psci.S | 20 ++------------------
>  2 files changed, 20 insertions(+), 18 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
> index d688607..315c20b 100644
> --- a/arch/arm/cpu/armv7/psci.S
> +++ b/arch/arm/cpu/armv7/psci.S
> @@ -170,4 +170,22 @@ ENTRY(psci_cpu_off_common)
>  	bx	lr
>  ENDPROC(psci_cpu_off_common)
>  
> +ENTRY(psci_cpu_entry)
> +	@ Set SMP bit
> +	mrc	p15, 0, r0, c1, c0, 1		@ ACTLR
> +	orr	r0, r0, #(1 << 6)		@ Set SMP bit
> +	mcr	p15, 0, r0, c1, c0, 1		@ ACTLR
> +	isb
> +
> +	bl	_nonsec_init
> +
> +	adr	r0, _psci_target_pc
> +	ldr	r0, [r0]
> +	b	_do_nonsec_entry
> +ENDPROC(psci_cpu_entry)

I'd add a *big* comment at the top of this. ACTLR is implementation
dependent, and while sticking the SMP bit at this location is fairly
common among ARM cores, it is by no mean a strong guarantee (this is
not an architectural feature).

I'd recommend making it override-able.

> +.globl _psci_target_pc
> +_psci_target_pc:
> +	.word	0
> +
>  	.popsection
> diff --git a/arch/arm/cpu/armv7/sunxi/psci.S
> b/arch/arm/cpu/armv7/sunxi/psci.S index bb3d4ef..9ea3ce8 100644
> --- a/arch/arm/cpu/armv7/sunxi/psci.S
> +++ b/arch/arm/cpu/armv7/sunxi/psci.S
> @@ -139,7 +139,7 @@ out:	mcr	p15, 0, r7, c1, c1, 0
>  	@ r2 = target PC
>  .globl	psci_cpu_on
>  psci_cpu_on:
> -	adr	r0, _target_pc
> +	ldr	r0, =_psci_target_pc
>  	str	r2, [r0]
>  	dsb
>  
> @@ -151,7 +151,7 @@ psci_cpu_on:
>  	mov	r4, #1
>  	lsl	r4, r4, r1
>  
> -	adr	r6, _sunxi_cpu_entry
> +	ldr	r6, =psci_cpu_entry
>  	str	r6, [r0, #0x1a4] @ PRIVATE_REG (boot vector)
>  
>  	@ Assert reset on target CPU
> @@ -197,22 +197,6 @@ psci_cpu_on:
>  	mov	r0, #ARM_PSCI_RET_SUCCESS	@ Return
> PSCI_RET_SUCCESS mov	pc, lr
>  
> -_target_pc:
> -	.word	0
> -
> -_sunxi_cpu_entry:
> -	@ Set SMP bit
> -	mrc	p15, 0, r0, c1, c0, 1
> -	orr	r0, r0, #0x40
> -	mcr	p15, 0, r0, c1, c0, 1
> -	isb
> -
> -	bl	_nonsec_init
> -
> -	adr	r0, _target_pc
> -	ldr	r0, [r0]
> -	b	_do_nonsec_entry
> -
>  .globl	psci_cpu_off
>  psci_cpu_off:
>  	bl	psci_cpu_off_common



-- 
Jazz is not dead. It just smells funny.

  reply	other threads:[~2015-02-28 13:53 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-27 13:27 [U-Boot] [PATCH v4 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 01/14] sun7i: Remove duplicate call to psci_arch_init Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 02/14] ARM: Factor out armv7_get_cpu_id macro Jan Kiszka
2015-02-28 13:56   ` Marc Zyngier
2015-03-02  9:40     ` Jan Kiszka
2015-03-02 10:19       ` Marc Zyngier
2015-03-02 12:14         ` Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 03/14] ARM: Factor out reusable psci_cpu_off_common Jan Kiszka
2015-02-28 13:55   ` Marc Zyngier
2015-02-27 13:28 ` [U-Boot] [PATCH v4 04/14] ARM: Factor out reusable psci_cpu_entry Jan Kiszka
2015-02-28 13:53   ` Marc Zyngier [this message]
2015-03-01  9:16     ` Ian Campbell
2015-02-27 13:28 ` [U-Boot] [PATCH v4 05/14] ARM: Factor out reusable psci_get_cpu_stack_top Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 06/14] ARM: Put target PC for PSCI CPU_ON on per-CPU stack Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 07/14] tegra124: Add more registers to struct mc_ctlr Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 08/14] virt-dt: Allow reservation of secure region when in a RAM carveout Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 09/14] tegra: Make tegra_powergate_power_on public Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 10/14] tegra: Add ap_pm_init hook Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 11/14] tegra124: Add PSCI support for Tegra124 Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 12/14] jetson-tk1: Add PSCI configuration options and reserve secure code Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 13/14] tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0 Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 14/14] tegra: Set CNTFRQ for secondary CPUs Jan Kiszka
2015-03-08 20:08 ` [U-Boot] [PATCH v4 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix Ian Campbell
2015-03-09  6:52   ` Jan Kiszka

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20150228135312.0d493843@arm.com \
    --to=marc.zyngier@arm.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.