From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCHv2 01/20] arm: socfpga: spl: Add main sdram code
Date: Wed, 4 Mar 2015 20:48:13 +0100 [thread overview]
Message-ID: <201503042048.13335.marex@denx.de> (raw)
In-Reply-To: <1425313688-23595-2-git-send-email-dinguyen@opensource.altera.com>
On Monday, March 02, 2015 at 05:27:49 PM, dinguyen at opensource.altera.com wrote:
> From: Dinh Nguyen <dinguyen@opensource.altera.com>
>
> This adds the code to configure the SDRAM controller that is found in the
> SoCFGPA Cyclone5 and Arria5 platforms.
>
> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Hi!
[...]
> diff --git a/arch/arm/include/asm/arch-socfpga/sdram.h
> b/arch/arm/include/asm/arch-socfpga/sdram.h new file mode 100644
> index 0000000..83e45d2
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-socfpga/sdram.h
> @@ -0,0 +1,434 @@
> +/*
> + * Copyright (C) 2014 Altera Corporation <www.altera.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +#ifndef _SDRAM_H_
> +#define _SDRAM_H_
> +
> +#ifndef __ASSEMBLY__
> +
> +/* function declaration */
> +unsigned long sdram_calculate_size(void);
> +unsigned sdram_mmr_init_full(unsigned int sdr_phy_reg);
> +int sdram_calibration_full(void);
> +
> +extern int sdram_calibration(void);
Is the "extern" keyword really needed here ?
> +/* Group: sdr.phygrp.sccgrp
> */ +#define SDR_PHYGRP_SCCGRP_ADDRESS 0x0
Can you define these registers using the struct-based access please ?
> +/* Group: sdr.phygrp.phymgrgrp
> */ +#define SDR_PHYGRP_PHYMGRGRP_ADDRESS 0x1000
> +/* Group: sdr.phygrp.rwmgrgrp
> */ +#define SDR_PHYGRP_RWMGRGRP_ADDRESS 0x2000
[...]
> diff --git a/arch/arm/include/asm/arch-socfpga/sdram_config.h
> b/arch/arm/include/asm/arch-socfpga/sdram_config.h new file mode 100644
> index 0000000..5c3ba86
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-socfpga/sdram_config.h
> @@ -0,0 +1,100 @@
> +/*
> + * Copyright Altera Corporation (C) 2012-2014. All rights reserved
> + *
> + * SPDX-License-Identifier: BSD-3-Clause
> + */
> +
> +#ifndef __SDRAM_CONFIG_H
> +#define __SDRAM_CONFIG_H
> +
> +#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE (2)
> +#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL (8)
> +#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER (0)
You can drop those brackets around numeric values, there's no point in them.
[...]
About the rest of the code ... what is your feeling when you look at the code?
What do you think of the code quality ? Do you think it's good or do you think
there are obvious places where it can be improved ?
next prev parent reply other threads:[~2015-03-04 19:48 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-02 16:27 [U-Boot] [PATCHv2 00/20] Add SPL support for SoCFPGA dinguyen at opensource.altera.com
2015-03-02 16:27 ` [U-Boot] [PATCHv2 01/20] arm: socfpga: spl: Add main sdram code dinguyen at opensource.altera.com
2015-03-04 19:48 ` Marek Vasut [this message]
2015-03-02 16:27 ` [U-Boot] [PATCHv2 02/20] arm: socfpga: spl: Add SRAM section dinguyen at opensource.altera.com
2015-03-04 12:39 ` Marek Vasut
2015-03-04 18:52 ` Dinh Nguyen
2015-03-04 19:39 ` Marek Vasut
2015-03-04 21:34 ` Dinh Nguyen
2015-03-05 20:59 ` Marek Vasut
2015-03-09 21:40 ` Dinh Nguyen
2015-03-02 16:27 ` [U-Boot] [PATCHv2 03/20] arm: socfpga: spl: put SPL in sram dinguyen at opensource.altera.com
2015-03-04 12:40 ` Marek Vasut
2015-03-02 16:27 ` [U-Boot] [PATCHv2 04/20] arm: socfpga: add functions to bring sdram, timer, and uart out of reset dinguyen at opensource.altera.com
2015-03-02 16:27 ` [U-Boot] [PATCHv2 05/20] arm: socfpga: spl: enable sdram, timer and uart dinguyen at opensource.altera.com
2015-03-02 16:27 ` [U-Boot] [PATCHv2 06/20] arm: socfpga: spl: Add call to timer_init dinguyen at opensource.altera.com
2015-03-04 12:42 ` Marek Vasut
2015-03-02 16:27 ` [U-Boot] [PATCHv2 07/20] arm: socfpga: spl: allow bootrom to enable IOs after warm reset dinguyen at opensource.altera.com
2015-03-02 16:27 ` [U-Boot] [PATCHv2 08/20] arm: socfpga: spl: add sdram init and calibration dinguyen at opensource.altera.com
2015-03-04 12:45 ` Marek Vasut
2015-03-02 16:27 ` [U-Boot] [PATCHv2 09/20] arm: socfpga: spl: printout sdram size dinguyen at opensource.altera.com
2015-03-04 12:48 ` Marek Vasut
2015-03-02 16:27 ` [U-Boot] [PATCHv2 10/20] arm: socfpga: spl: Use common lowlevel_init dinguyen at opensource.altera.com
2015-03-04 13:11 ` Marek Vasut
2015-03-02 16:27 ` [U-Boot] [PATCHv2 11/20] arm: socfpga: spl: Add s_init dinguyen at opensource.altera.com
2015-03-02 16:28 ` [U-Boot] [PATCHv2 12/20] arm: socfpga: spl: add the stack in OCRAM dinguyen at opensource.altera.com
2015-03-04 13:14 ` Marek Vasut
2015-03-02 16:28 ` [U-Boot] [PATCHv2 13/20] arm: socfpga: spl: add CONFIG_SPL_STACK to socfpga_common.h dinguyen at opensource.altera.com
2015-03-04 13:14 ` Marek Vasut
2015-03-02 16:28 ` [U-Boot] [PATCHv2 14/20] arm: socfpga: add sdram stack to SPL dinguyen at opensource.altera.com
2015-03-04 13:15 ` Marek Vasut
2015-03-02 16:28 ` [U-Boot] [PATCHv2 15/20] arm: socfpga: spl: adjust SPL_MALLOC_SIZE to 256 dinguyen at opensource.altera.com
2015-03-04 13:16 ` Marek Vasut
2015-03-27 20:10 ` Dinh Nguyen
2015-03-29 23:45 ` Marek Vasut
2015-03-02 16:28 ` [U-Boot] [PATCHv2 16/20] arm: socfpga: spl: add a malloc section in sram dinguyen at opensource.altera.com
2015-03-04 13:19 ` Marek Vasut
2015-03-02 16:28 ` [U-Boot] [PATCHv2 17/20] arm: socfpga: spl: Add SDRAM check dinguyen at opensource.altera.com
2015-03-04 13:21 ` Marek Vasut
2015-03-09 21:59 ` Dinh Nguyen
2015-03-10 13:39 ` Marek Vasut
2015-03-02 16:28 ` [U-Boot] [PATCHv2 18/20] arm: socfpga: spl: add board_init_f to SPL dinguyen at opensource.altera.com
2015-03-04 13:22 ` Marek Vasut
2015-03-02 16:28 ` [U-Boot] [PATCHv2 19/20] arm: socfpga: spl: update pll_config for dev kit dinguyen at opensource.altera.com
2015-03-04 13:22 ` Marek Vasut
2015-03-02 16:28 ` [U-Boot] [PATCHv2 20/20] arm: socfpga: remove the need to map sdram in arch_early_init dinguyen at opensource.altera.com
2015-03-04 13:22 ` Marek Vasut
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