From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753720AbbCEAzX (ORCPT ); Wed, 4 Mar 2015 19:55:23 -0500 Received: from mail-wg0-f52.google.com ([74.125.82.52]:46979 "EHLO mail-wg0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751374AbbCEAzW (ORCPT ); Wed, 4 Mar 2015 19:55:22 -0500 Date: Thu, 5 Mar 2015 01:55:16 +0100 From: Ingo Molnar To: Vince Weaver , Peter Zijlstra Cc: vikas.shivappa@linux.intel.com, hpa@zytor.com, acme@kernel.org, linux-kernel@vger.kernel.org, tglx@linutronix.de, acme@redhat.com, torvalds@linux-foundation.org, matt.fleming@intel.com, kanaka.d.juvva@intel.com, jolsa@redhat.com, peterz@infradead.org Subject: Re: [tip:perf/x86] perf/x86/intel: Support task events with Intel CQM Message-ID: <20150305005516.GB21715@gmail.com> References: <1422038748-21397-8-git-send-email-matt@codeblueprint.co.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Vince Weaver wrote: > On Wed, 25 Feb 2015, tip-bot for Matt Fleming wrote: > > > diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h > > index 1e3cd07..3c8b45d 100644 > > --- a/include/uapi/linux/perf_event.h > > +++ b/include/uapi/linux/perf_event.h > > @@ -32,6 +32,7 @@ enum perf_type_id { > > PERF_TYPE_HW_CACHE = 3, > > PERF_TYPE_RAW = 4, > > PERF_TYPE_BREAKPOINT = 5, > > + PERF_TYPE_INTEL_CQM = 6, > > > > PERF_TYPE_MAX, /* non-ABI */ > > }; > > I thought the rule was no adding support for things in perf_event unless > they were sufficiently generic as to be cross-architecture. > > Having a high-level event type with "intel" in the name seems awfully > specific. That's a fair point. Peter? Thanks, Ingo