From: Bjorn Helgaas <bhelgaas@google.com>
To: Wei Yang <weiyang@linux.vnet.ibm.com>
Cc: benh@au1.ibm.com, gwshan@linux.vnet.ibm.com,
linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v12 15/21] powerpc/powernv: Reserve additional space for IOV BAR according to the number of total_pe
Date: Tue, 10 Mar 2015 21:51:25 -0500 [thread overview]
Message-ID: <20150311025125.GC10994@google.com> (raw)
In-Reply-To: <20150302074132.GG21571@richard>
On Mon, Mar 02, 2015 at 03:41:32PM +0800, Wei Yang wrote:
> On Tue, Feb 24, 2015 at 02:52:34AM -0600, Bjorn Helgaas wrote:
> >On Tue, Feb 24, 2015 at 02:34:42AM -0600, Bjorn Helgaas wrote:
> >> From: Wei Yang <weiyang@linux.vnet.ibm.com>
> >>
> >> On PHB3, PF IOV BAR will be covered by M64 window to have better PE
> >> isolation. The total_pe number is usually different from total_VFs, which
> >> can lead to a conflict between MMIO space and the PE number.
> >>
> >> For example, if total_VFs is 128 and total_pe is 256, the second half of
> >> M64 window will be part of other PCI device, which may already belong
> >> to other PEs.
> >
> >I'm still trying to wrap my mind around the explanation here.
> >
> >I *think* what's going on is that the M64 window must be a power-of-two
> >size. If the VF(n) BAR space doesn't completely fill it, we might allocate
> >the leftover space to another device. Then the M64 window for *this*
> >device may cause the other device to be associated with a PE it didn't
> >expect.
>
> Yes, this is the exact reason.
Can you include some of this text in your changelog, then? I can wordsmith
it and try to make it fit together better.
> >> +#ifdef CONFIG_PCI_IOV
> >> +static void pnv_pci_ioda_fixup_iov_resources(struct pci_dev *pdev)
> >> +{
> >> + struct pci_controller *hose;
> >> + struct pnv_phb *phb;
> >> + struct resource *res;
> >> + int i;
> >> + resource_size_t size;
> >> + struct pci_dn *pdn;
> >> +
> >> + if (!pdev->is_physfn || pdev->is_added)
> >> + return;
> >> +
> >> + hose = pci_bus_to_host(pdev->bus);
> >> + phb = hose->private_data;
> >> +
> >> + pdn = pci_get_pdn(pdev);
> >> + pdn->max_vfs = 0;
> >> +
> >> + for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
> >> + res = &pdev->resource[i + PCI_IOV_RESOURCES];
> >> + if (!res->flags || res->parent)
> >> + continue;
> >> + if (!pnv_pci_is_mem_pref_64(res->flags)) {
> >> + dev_warn(&pdev->dev, "Skipping expanding VF BAR%d: %pR\n",
> >> + i, res);
> >> + continue;
> >> + }
> >> +
> >> + dev_dbg(&pdev->dev, " Fixing VF BAR%d: %pR to\n", i, res);
> >> + size = pci_iov_resource_size(pdev, i + PCI_IOV_RESOURCES);
> >> + res->end = res->start + size * phb->ioda.total_pe - 1;
> >> + dev_dbg(&pdev->dev, " %pR\n", res);
> >> + dev_info(&pdev->dev, "VF BAR%d: %pR (expanded to %d VFs for PE alignment)",
> >> + i, res, phb->ioda.total_pe);
> >> + }
> >> + pdn->max_vfs = phb->ioda.total_pe;
> >> +}
> >> +
> >> +static void pnv_pci_ioda_fixup_sriov(struct pci_bus *bus)
> >> +{
> >> + struct pci_dev *pdev;
> >> + struct pci_bus *b;
> >> +
> >> + list_for_each_entry(pdev, &bus->devices, bus_list) {
> >> + b = pdev->subordinate;
> >> +
> >> + if (b)
> >> + pnv_pci_ioda_fixup_sriov(b);
> >> +
> >> + pnv_pci_ioda_fixup_iov_resources(pdev);
> >
> >I'm not sure this happens at the right time. We have this call chain:
> >
> > pcibios_scan_phb
> > pci_create_root_bus
> > pci_scan_child_bus
> > pnv_pci_ioda_fixup_sriov
> > pnv_pci_ioda_fixup_iov_resources
> > for (i = 0; i < PCI_SRIOV_NUM_BARS; i++)
> > increase res->size to accomodate 256 PEs (or roundup(totalVFs)
> >
> >so we only do the fixup_iov_resources() when we scan the PHB, and we
> >wouldn't do it at all for hot-added devices.
>
> Yep, you are right :-)
>
> I had a separate patch to do this in pcibios_add_pci_devices(). Looks we could
> merge them.
Did you fix this in v13? I don't see the change if you did.
> >> + }
> >> +}
> >> +#endif /* CONFIG_PCI_IOV */
> >> +
> >> /*
> >> * This function is supposed to be called on basis of PE from top
> >> * to bottom style. So the the I/O or MMIO segment assigned to
> >> @@ -2125,6 +2180,9 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,
> >> ppc_md.pcibios_enable_device_hook = pnv_pci_enable_device_hook;
> >> ppc_md.pcibios_window_alignment = pnv_pci_window_alignment;
> >> ppc_md.pcibios_reset_secondary_bus = pnv_pci_reset_secondary_bus;
> >> +#ifdef CONFIG_PCI_IOV
> >> + ppc_md.pcibios_fixup_sriov = pnv_pci_ioda_fixup_sriov;
> >> +#endif /* CONFIG_PCI_IOV */
> >> pci_add_flags(PCI_REASSIGN_ALL_RSRC);
> >>
> >> /* Reset IODA tables to a clean state */
> >>
>
> --
> Richard Yang
> Help you, Help me
>
WARNING: multiple messages have this Message-ID (diff)
From: Bjorn Helgaas <bhelgaas@google.com>
To: Wei Yang <weiyang@linux.vnet.ibm.com>
Cc: linux-pci@vger.kernel.org, benh@au1.ibm.com,
linuxppc-dev@lists.ozlabs.org, gwshan@linux.vnet.ibm.com
Subject: Re: [PATCH v12 15/21] powerpc/powernv: Reserve additional space for IOV BAR according to the number of total_pe
Date: Tue, 10 Mar 2015 21:51:25 -0500 [thread overview]
Message-ID: <20150311025125.GC10994@google.com> (raw)
In-Reply-To: <20150302074132.GG21571@richard>
On Mon, Mar 02, 2015 at 03:41:32PM +0800, Wei Yang wrote:
> On Tue, Feb 24, 2015 at 02:52:34AM -0600, Bjorn Helgaas wrote:
> >On Tue, Feb 24, 2015 at 02:34:42AM -0600, Bjorn Helgaas wrote:
> >> From: Wei Yang <weiyang@linux.vnet.ibm.com>
> >>
> >> On PHB3, PF IOV BAR will be covered by M64 window to have better PE
> >> isolation. The total_pe number is usually different from total_VFs, which
> >> can lead to a conflict between MMIO space and the PE number.
> >>
> >> For example, if total_VFs is 128 and total_pe is 256, the second half of
> >> M64 window will be part of other PCI device, which may already belong
> >> to other PEs.
> >
> >I'm still trying to wrap my mind around the explanation here.
> >
> >I *think* what's going on is that the M64 window must be a power-of-two
> >size. If the VF(n) BAR space doesn't completely fill it, we might allocate
> >the leftover space to another device. Then the M64 window for *this*
> >device may cause the other device to be associated with a PE it didn't
> >expect.
>
> Yes, this is the exact reason.
Can you include some of this text in your changelog, then? I can wordsmith
it and try to make it fit together better.
> >> +#ifdef CONFIG_PCI_IOV
> >> +static void pnv_pci_ioda_fixup_iov_resources(struct pci_dev *pdev)
> >> +{
> >> + struct pci_controller *hose;
> >> + struct pnv_phb *phb;
> >> + struct resource *res;
> >> + int i;
> >> + resource_size_t size;
> >> + struct pci_dn *pdn;
> >> +
> >> + if (!pdev->is_physfn || pdev->is_added)
> >> + return;
> >> +
> >> + hose = pci_bus_to_host(pdev->bus);
> >> + phb = hose->private_data;
> >> +
> >> + pdn = pci_get_pdn(pdev);
> >> + pdn->max_vfs = 0;
> >> +
> >> + for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
> >> + res = &pdev->resource[i + PCI_IOV_RESOURCES];
> >> + if (!res->flags || res->parent)
> >> + continue;
> >> + if (!pnv_pci_is_mem_pref_64(res->flags)) {
> >> + dev_warn(&pdev->dev, "Skipping expanding VF BAR%d: %pR\n",
> >> + i, res);
> >> + continue;
> >> + }
> >> +
> >> + dev_dbg(&pdev->dev, " Fixing VF BAR%d: %pR to\n", i, res);
> >> + size = pci_iov_resource_size(pdev, i + PCI_IOV_RESOURCES);
> >> + res->end = res->start + size * phb->ioda.total_pe - 1;
> >> + dev_dbg(&pdev->dev, " %pR\n", res);
> >> + dev_info(&pdev->dev, "VF BAR%d: %pR (expanded to %d VFs for PE alignment)",
> >> + i, res, phb->ioda.total_pe);
> >> + }
> >> + pdn->max_vfs = phb->ioda.total_pe;
> >> +}
> >> +
> >> +static void pnv_pci_ioda_fixup_sriov(struct pci_bus *bus)
> >> +{
> >> + struct pci_dev *pdev;
> >> + struct pci_bus *b;
> >> +
> >> + list_for_each_entry(pdev, &bus->devices, bus_list) {
> >> + b = pdev->subordinate;
> >> +
> >> + if (b)
> >> + pnv_pci_ioda_fixup_sriov(b);
> >> +
> >> + pnv_pci_ioda_fixup_iov_resources(pdev);
> >
> >I'm not sure this happens at the right time. We have this call chain:
> >
> > pcibios_scan_phb
> > pci_create_root_bus
> > pci_scan_child_bus
> > pnv_pci_ioda_fixup_sriov
> > pnv_pci_ioda_fixup_iov_resources
> > for (i = 0; i < PCI_SRIOV_NUM_BARS; i++)
> > increase res->size to accomodate 256 PEs (or roundup(totalVFs)
> >
> >so we only do the fixup_iov_resources() when we scan the PHB, and we
> >wouldn't do it at all for hot-added devices.
>
> Yep, you are right :-)
>
> I had a separate patch to do this in pcibios_add_pci_devices(). Looks we could
> merge them.
Did you fix this in v13? I don't see the change if you did.
> >> + }
> >> +}
> >> +#endif /* CONFIG_PCI_IOV */
> >> +
> >> /*
> >> * This function is supposed to be called on basis of PE from top
> >> * to bottom style. So the the I/O or MMIO segment assigned to
> >> @@ -2125,6 +2180,9 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,
> >> ppc_md.pcibios_enable_device_hook = pnv_pci_enable_device_hook;
> >> ppc_md.pcibios_window_alignment = pnv_pci_window_alignment;
> >> ppc_md.pcibios_reset_secondary_bus = pnv_pci_reset_secondary_bus;
> >> +#ifdef CONFIG_PCI_IOV
> >> + ppc_md.pcibios_fixup_sriov = pnv_pci_ioda_fixup_sriov;
> >> +#endif /* CONFIG_PCI_IOV */
> >> pci_add_flags(PCI_REASSIGN_ALL_RSRC);
> >>
> >> /* Reset IODA tables to a clean state */
> >>
>
> --
> Richard Yang
> Help you, Help me
>
next prev parent reply other threads:[~2015-03-11 2:51 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-24 8:32 [PATCH v12 00/21] Enable SRIOV on Power8 Bjorn Helgaas
2015-02-24 8:33 ` [PATCH v12 01/21] PCI: Print more info in sriov_enable() error message Bjorn Helgaas
2015-02-24 8:33 ` [PATCH v12 02/21] PCI: Print PF SR-IOV resource that contains all VF(n) BAR space Bjorn Helgaas
2015-02-24 8:33 ` [PATCH v12 03/21] PCI: Keep individual VF BAR size in struct pci_sriov Bjorn Helgaas
2015-02-24 8:33 ` [PATCH v12 04/21] PCI: Index IOV resources in the conventional style Bjorn Helgaas
2015-02-24 8:33 ` [PATCH v12 05/21] PCI: Refresh First VF Offset and VF Stride when updating NumVFs Bjorn Helgaas
2015-02-24 8:33 ` [PATCH v12 06/21] PCI: Calculate maximum number of buses required for VFs Bjorn Helgaas
2015-02-24 8:33 ` [PATCH v12 07/21] PCI: Export pci_iov_virtfn_bus() and pci_iov_virtfn_devfn() Bjorn Helgaas
2015-02-24 8:33 ` [PATCH v12 08/21] PCI: Add pcibios_sriov_enable() and pcibios_sriov_disable() Bjorn Helgaas
2015-02-24 8:39 ` Bjorn Helgaas
2015-03-02 6:53 ` Wei Yang
2015-03-02 6:53 ` Wei Yang
2015-02-24 8:33 ` [PATCH v12 09/21] PCI: Add pcibios_iov_resource_alignment() interface Bjorn Helgaas
2015-02-24 8:34 ` [PATCH v12 10/21] PCI: Consider additional PF's IOV BAR alignment in sizing and assigning Bjorn Helgaas
2015-02-24 8:41 ` Bjorn Helgaas
2015-03-02 7:32 ` Wei Yang
2015-03-02 7:32 ` Wei Yang
2015-03-11 2:36 ` Bjorn Helgaas
2015-03-11 2:36 ` Bjorn Helgaas
2015-03-11 9:17 ` Wei Yang
2015-03-11 9:17 ` Wei Yang
2015-02-24 8:34 ` [PATCH v12 11/21] powerpc/pci: Don't unset PCI resources for VFs Bjorn Helgaas
2015-02-24 8:44 ` Bjorn Helgaas
2015-03-02 7:34 ` Wei Yang
2015-03-02 7:34 ` Wei Yang
2015-02-24 8:34 ` [PATCH v12 12/21] powerpc/pci: Refactor pci_dn Bjorn Helgaas
2015-02-24 8:34 ` [PATCH v12 13/21] powerpc/powernv: Use pci_dn, not device_node, in PCI config accessor Bjorn Helgaas
2015-02-24 8:34 ` [PATCH v12 14/21] powerpc/powernv: Allocate struct pnv_ioda_pe iommu_table dynamically Bjorn Helgaas
2015-02-24 8:46 ` Bjorn Helgaas
2015-03-02 7:50 ` Wei Yang
2015-03-02 7:50 ` Wei Yang
2015-03-02 7:56 ` Benjamin Herrenschmidt
2015-03-02 7:56 ` Benjamin Herrenschmidt
2015-03-02 8:02 ` Wei Yang
2015-03-02 8:02 ` Wei Yang
2015-03-11 2:47 ` Bjorn Helgaas
2015-03-11 2:47 ` Bjorn Helgaas
2015-03-11 6:13 ` Wei Yang
2015-03-11 6:13 ` Wei Yang
2015-02-24 8:34 ` [PATCH v12 15/21] powerpc/powernv: Reserve additional space for IOV BAR according to the number of total_pe Bjorn Helgaas
2015-02-24 8:52 ` Bjorn Helgaas
2015-03-02 7:41 ` Wei Yang
2015-03-02 7:41 ` Wei Yang
2015-03-11 2:51 ` Bjorn Helgaas [this message]
2015-03-11 2:51 ` Bjorn Helgaas
2015-03-11 6:22 ` Wei Yang
2015-03-11 6:22 ` Wei Yang
2015-03-11 13:40 ` Bjorn Helgaas
2015-03-11 13:40 ` Bjorn Helgaas
2015-02-24 8:34 ` [PATCH v12 16/21] powerpc/powernv: Implement pcibios_iov_resource_alignment() on powernv Bjorn Helgaas
2015-02-24 8:34 ` [PATCH v12 17/21] powerpc/powernv: Shift VF resource with an offset Bjorn Helgaas
2015-02-24 9:00 ` Bjorn Helgaas
2015-02-24 17:10 ` Bjorn Helgaas
2015-03-02 7:58 ` Wei Yang
2015-03-02 7:58 ` Wei Yang
2015-03-04 3:01 ` Wei Yang
2015-03-04 3:01 ` Wei Yang
2015-03-11 2:55 ` Bjorn Helgaas
2015-03-11 2:55 ` Bjorn Helgaas
2015-03-11 6:42 ` Wei Yang
2015-03-11 6:42 ` Wei Yang
2015-02-24 9:03 ` Bjorn Helgaas
2015-02-24 8:35 ` [PATCH v12 18/21] powerpc/powernv: Reserve additional space for IOV BAR, with m64_per_iov supported Bjorn Helgaas
2015-02-24 9:06 ` Bjorn Helgaas
2015-03-02 7:55 ` Wei Yang
2015-03-02 7:55 ` Wei Yang
2015-02-24 8:35 ` [PATCH v12 19/21] powerpc/powernv: Group VF PE when IOV BAR is big on PHB3 Bjorn Helgaas
2015-02-24 8:35 ` [PATCH v12 20/21] powerpc/pci: Remove unused struct pci_dn.pcidev field Bjorn Helgaas
2015-02-24 8:35 ` [PATCH v12 21/21] powerpc/pci: Add PCI resource alignment documentation Bjorn Helgaas
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