From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter De Schrijver Subject: Re: [PATCH v2 17/17] soc/tegra: remove lagacy powergate APIs Date: Thu, 12 Mar 2015 18:18:49 +0200 Message-ID: <20150312161849.GF6072@tbergstrom-lnx.Nvidia.com> References: <1426162518-7405-1-git-send-email-vinceh@nvidia.com> <1426162518-7405-18-git-send-email-vinceh@nvidia.com> <20150312124501.GA632@ulmo> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Return-path: Received: from hqemgate16.nvidia.com ([216.228.121.65]:7872 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030244AbbCLQTI (ORCPT ); Thu, 12 Mar 2015 12:19:08 -0400 Content-Disposition: inline In-Reply-To: <20150312124501.GA632@ulmo> Sender: linux-pm-owner@vger.kernel.org List-Id: linux-pm@vger.kernel.org To: Thierry Reding Cc: Vince Hsu , swarren@wwwdotorg.org, gnurou@gmail.com, jroedel@suse.de, p.zabel@pengutronix.de, mturquette@linaro.org, pgaikwad@nvidia.com, sboyd@codeaurora.org, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, tbergstrom@nvidia.com, airlied@linux.ie, bhelgaas@google.com, tj@kernel.org, arnd@arndb.de, robh@kernel.org, will.deacon@arm.com, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, rjw@rjwysocki.net, viresh.kumar@linaro.org On Thu, Mar 12, 2015 at 01:45:02PM +0100, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Thu, Mar 12, 2015 at 08:15:18PM +0800, Vince Hsu wrote: > > We switch to generic power domain now. So remove the legacy functions. > > > > Signed-off-by: Vince Hsu > > --- > > drivers/soc/tegra/pmc.c | 68 ------------------------------------------------- > > include/soc/tegra/pmc.h | 22 ---------------- > > 2 files changed, 90 deletions(-) > > I don't think we can do this. What if somebody updates their kernel but > not the DTB? In that case they'll end up with drivers that don't enable > power partitions but at the same time the powergate driver won't enable > them either because it is missing the corresponding nodes in the DTB. > > What we'll have to do is probably keep the code that enables the power > partitions and make it conditional on the power domains somehow. Is > there a way to determine at runtime whether a device has been attached > to a power domain? Or use DT overlays to 'load' a hardcoded overlay for the specific SoC? Cheers, Peter. From mboxrd@z Thu Jan 1 00:00:00 1970 From: pdeschrijver@nvidia.com (Peter De Schrijver) Date: Thu, 12 Mar 2015 18:18:49 +0200 Subject: [PATCH v2 17/17] soc/tegra: remove lagacy powergate APIs In-Reply-To: <20150312124501.GA632@ulmo> References: <1426162518-7405-1-git-send-email-vinceh@nvidia.com> <1426162518-7405-18-git-send-email-vinceh@nvidia.com> <20150312124501.GA632@ulmo> Message-ID: <20150312161849.GF6072@tbergstrom-lnx.Nvidia.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thu, Mar 12, 2015 at 01:45:02PM +0100, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Thu, Mar 12, 2015 at 08:15:18PM +0800, Vince Hsu wrote: > > We switch to generic power domain now. So remove the legacy functions. > > > > Signed-off-by: Vince Hsu > > --- > > drivers/soc/tegra/pmc.c | 68 ------------------------------------------------- > > include/soc/tegra/pmc.h | 22 ---------------- > > 2 files changed, 90 deletions(-) > > I don't think we can do this. What if somebody updates their kernel but > not the DTB? In that case they'll end up with drivers that don't enable > power partitions but at the same time the powergate driver won't enable > them either because it is missing the corresponding nodes in the DTB. > > What we'll have to do is probably keep the code that enables the power > partitions and make it conditional on the power domains somehow. Is > there a way to determine at runtime whether a device has been attached > to a power domain? Or use DT overlays to 'load' a hardcoded overlay for the specific SoC? Cheers, Peter. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030321AbbCLQTN (ORCPT ); Thu, 12 Mar 2015 12:19:13 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:7872 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030244AbbCLQTI (ORCPT ); Thu, 12 Mar 2015 12:19:08 -0400 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Thu, 12 Mar 2015 09:17:32 -0700 Date: Thu, 12 Mar 2015 18:18:49 +0200 From: Peter De Schrijver To: Thierry Reding CC: Vince Hsu , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v2 17/17] soc/tegra: remove lagacy powergate APIs Message-ID: <20150312161849.GF6072@tbergstrom-lnx.Nvidia.com> References: <1426162518-7405-1-git-send-email-vinceh@nvidia.com> <1426162518-7405-18-git-send-email-vinceh@nvidia.com> <20150312124501.GA632@ulmo> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20150312124501.GA632@ulmo> X-NVConfidentiality: public User-Agent: Mutt/1.5.21 (2010-09-15) X-Originating-IP: [10.21.24.170] X-ClientProxiedBy: UKMAIL101.nvidia.com (10.26.138.13) To UKMAIL101.nvidia.com (10.26.138.13) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 12, 2015 at 01:45:02PM +0100, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Thu, Mar 12, 2015 at 08:15:18PM +0800, Vince Hsu wrote: > > We switch to generic power domain now. So remove the legacy functions. > > > > Signed-off-by: Vince Hsu > > --- > > drivers/soc/tegra/pmc.c | 68 ------------------------------------------------- > > include/soc/tegra/pmc.h | 22 ---------------- > > 2 files changed, 90 deletions(-) > > I don't think we can do this. What if somebody updates their kernel but > not the DTB? In that case they'll end up with drivers that don't enable > power partitions but at the same time the powergate driver won't enable > them either because it is missing the corresponding nodes in the DTB. > > What we'll have to do is probably keep the code that enables the power > partitions and make it conditional on the power domains somehow. Is > there a way to determine at runtime whether a device has been attached > to a power domain? Or use DT overlays to 'load' a hardcoded overlay for the specific SoC? Cheers, Peter.