All of lore.kernel.org
 help / color / mirror / Atom feed
From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/5] arm-cci: Fix CCI PMU event validation
Date: Tue, 17 Mar 2015 18:52:47 +0000	[thread overview]
Message-ID: <20150317185247.GE8399@arm.com> (raw)
In-Reply-To: <1426000735-14375-6-git-send-email-suzuki.poulose@arm.com>

On Tue, Mar 10, 2015 at 03:18:55PM +0000, Suzuki K. Poulose wrote:
> From: "Suzuki K. Poulose" <suzuki.poulose@arm.com>
> 
> We mask the event with the CCI_PMU_EVENT_MASK, before passing
> the config to pmu_validate_hw_event(), which causes extra bits
> to be ignored and qualifies an invalid event code as valid.
> 
> e.g,
>  $ perf stat -a -C 0 -e CCI_400/config=0x1ff,name=cycles/ sleep 1
>    Performance counter stats for 'system wide':
> 
>          506951142      cycles
> 
>        1.013879626 seconds time elapsed
> 
> where, cycles has an event coding of 0xff. This patch also removes
> the unnecessary 'event' mask in pmu_write_register, since the config_base
> is set by the pmu code after the event is validated.
> 
> Changes since V2:
>  - Switch to input unsigned long for pmu_validate_hw_event()
> 
> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
> ---
>  drivers/bus/arm-cci.c |   10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c
> index 581190d..89c86e9 100644
> --- a/drivers/bus/arm-cci.c
> +++ b/drivers/bus/arm-cci.c
> @@ -179,12 +179,15 @@ enum cci400_perf_events {
>  #define CCI_REV_R1_MASTER_PORT_MIN_EV	0x00
>  #define CCI_REV_R1_MASTER_PORT_MAX_EV	0x11
>  
> -static int pmu_validate_hw_event(u8 hw_event)
> +static int pmu_validate_hw_event(unsigned long hw_event)
>  {
>  	u8 ev_source = CCI_PMU_EVENT_SOURCE(hw_event);
>  	u8 ev_code = CCI_PMU_EVENT_CODE(hw_event);
>  	int if_type;
>  
> +	if (hw_event & ~CCI_PMU_EVENT_MASK)
> +		return -ENOENT;

Given that you want to build this for arm64, shouldn't CCI_PMU_EVENT_MASK
be an unsigned long too (i.e. 0xffUL)? Otherwise you won't detect set bits
in the upper word here.

Will

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
To: "Suzuki K. Poulose" <suzuki.poulose-5wv7dgnIgG8@public.gmane.org>
Cc: "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	Nicolas Pitre <nico-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Bartlomiej Zolnierkiewicz
	<b.zolnierkie-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
	Kukjin Kim <kgene-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Abhilash Kesavan
	<a.kesavan-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
	Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	Liviu Dudau <Liviu.Dudau-5wv7dgnIgG8@public.gmane.org>,
	Lorenzo Pieralisi
	<Lorenzo.Pieralisi-5wv7dgnIgG8@public.gmane.org>,
	Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org>,
	Pawel Moll <Pawel.Moll-5wv7dgnIgG8@public.gmane.org>,
	Punit Agrawal <Punit.Agrawal-5wv7dgnIgG8@public.gmane.org>,
	Sudeep Holla <Sudeep.Holla-5wv7dgnIgG8@public.gmane.org>,
	Catalin Marinas <Catalin.Marinas-5wv7dgnIgG8@public.gmane.org>
Subject: Re: [PATCH 5/5] arm-cci: Fix CCI PMU event validation
Date: Tue, 17 Mar 2015 18:52:47 +0000	[thread overview]
Message-ID: <20150317185247.GE8399@arm.com> (raw)
In-Reply-To: <1426000735-14375-6-git-send-email-suzuki.poulose-5wv7dgnIgG8@public.gmane.org>

On Tue, Mar 10, 2015 at 03:18:55PM +0000, Suzuki K. Poulose wrote:
> From: "Suzuki K. Poulose" <suzuki.poulose-5wv7dgnIgG8@public.gmane.org>
> 
> We mask the event with the CCI_PMU_EVENT_MASK, before passing
> the config to pmu_validate_hw_event(), which causes extra bits
> to be ignored and qualifies an invalid event code as valid.
> 
> e.g,
>  $ perf stat -a -C 0 -e CCI_400/config=0x1ff,name=cycles/ sleep 1
>    Performance counter stats for 'system wide':
> 
>          506951142      cycles
> 
>        1.013879626 seconds time elapsed
> 
> where, cycles has an event coding of 0xff. This patch also removes
> the unnecessary 'event' mask in pmu_write_register, since the config_base
> is set by the pmu code after the event is validated.
> 
> Changes since V2:
>  - Switch to input unsigned long for pmu_validate_hw_event()
> 
> Signed-off-by: Suzuki K. Poulose <suzuki.poulose-5wv7dgnIgG8@public.gmane.org>
> ---
>  drivers/bus/arm-cci.c |   10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c
> index 581190d..89c86e9 100644
> --- a/drivers/bus/arm-cci.c
> +++ b/drivers/bus/arm-cci.c
> @@ -179,12 +179,15 @@ enum cci400_perf_events {
>  #define CCI_REV_R1_MASTER_PORT_MIN_EV	0x00
>  #define CCI_REV_R1_MASTER_PORT_MAX_EV	0x11
>  
> -static int pmu_validate_hw_event(u8 hw_event)
> +static int pmu_validate_hw_event(unsigned long hw_event)
>  {
>  	u8 ev_source = CCI_PMU_EVENT_SOURCE(hw_event);
>  	u8 ev_code = CCI_PMU_EVENT_CODE(hw_event);
>  	int if_type;
>  
> +	if (hw_event & ~CCI_PMU_EVENT_MASK)
> +		return -ENOENT;

Given that you want to build this for arm64, shouldn't CCI_PMU_EVENT_MASK
be an unsigned long too (i.e. 0xffUL)? Otherwise you won't detect set bits
in the upper word here.

Will
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will.deacon@arm.com>
To: "Suzuki K. Poulose" <suzuki.poulose@arm.com>
Cc: "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	Nicolas Pitre <nico@linaro.org>,
	Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>,
	Kukjin Kim <kgene@kernel.org>,
	Abhilash Kesavan <a.kesavan@samsung.com>,
	Arnd Bergmann <arnd@arndb.de>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Liviu Dudau <Liviu.Dudau@arm.com>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
	Olof Johansson <olof@lixom.net>, Pawel Moll <Pawel.Moll@arm.com>,
	Punit Agrawal <Punit.Agrawal@arm.com>,
	Sudeep Holla <Sudeep.Holla@arm.com>,
	Catalin Marinas <Catalin.Marinas@arm.com>
Subject: Re: [PATCH 5/5] arm-cci: Fix CCI PMU event validation
Date: Tue, 17 Mar 2015 18:52:47 +0000	[thread overview]
Message-ID: <20150317185247.GE8399@arm.com> (raw)
In-Reply-To: <1426000735-14375-6-git-send-email-suzuki.poulose@arm.com>

On Tue, Mar 10, 2015 at 03:18:55PM +0000, Suzuki K. Poulose wrote:
> From: "Suzuki K. Poulose" <suzuki.poulose@arm.com>
> 
> We mask the event with the CCI_PMU_EVENT_MASK, before passing
> the config to pmu_validate_hw_event(), which causes extra bits
> to be ignored and qualifies an invalid event code as valid.
> 
> e.g,
>  $ perf stat -a -C 0 -e CCI_400/config=0x1ff,name=cycles/ sleep 1
>    Performance counter stats for 'system wide':
> 
>          506951142      cycles
> 
>        1.013879626 seconds time elapsed
> 
> where, cycles has an event coding of 0xff. This patch also removes
> the unnecessary 'event' mask in pmu_write_register, since the config_base
> is set by the pmu code after the event is validated.
> 
> Changes since V2:
>  - Switch to input unsigned long for pmu_validate_hw_event()
> 
> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
> ---
>  drivers/bus/arm-cci.c |   10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c
> index 581190d..89c86e9 100644
> --- a/drivers/bus/arm-cci.c
> +++ b/drivers/bus/arm-cci.c
> @@ -179,12 +179,15 @@ enum cci400_perf_events {
>  #define CCI_REV_R1_MASTER_PORT_MIN_EV	0x00
>  #define CCI_REV_R1_MASTER_PORT_MAX_EV	0x11
>  
> -static int pmu_validate_hw_event(u8 hw_event)
> +static int pmu_validate_hw_event(unsigned long hw_event)
>  {
>  	u8 ev_source = CCI_PMU_EVENT_SOURCE(hw_event);
>  	u8 ev_code = CCI_PMU_EVENT_CODE(hw_event);
>  	int if_type;
>  
> +	if (hw_event & ~CCI_PMU_EVENT_MASK)
> +		return -ENOENT;

Given that you want to build this for arm64, shouldn't CCI_PMU_EVENT_MASK
be an unsigned long too (i.e. 0xffUL)? Otherwise you won't detect set bits
in the upper word here.

Will

  reply	other threads:[~2015-03-17 18:52 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-10 15:18 [PATCHv3 0/5] arm-cci400: PMU monitoring support on ARM64 Suzuki K. Poulose
2015-03-10 15:18 ` Suzuki K. Poulose
2015-03-10 15:18 ` Suzuki K. Poulose
2015-03-10 15:18 ` [PATCH 1/5] arm-cci: Rearrange code for splitting PMU vs driver code Suzuki K. Poulose
2015-03-10 15:18   ` Suzuki K. Poulose
2015-03-10 15:18 ` [PATCH 2/5] arm-cci: Abstract the CCI400 PMU speicific definitions Suzuki K. Poulose
2015-03-10 15:18   ` Suzuki K. Poulose
2015-03-10 15:18   ` Suzuki K. Poulose
2015-03-17 18:49   ` Will Deacon
2015-03-17 18:49     ` Will Deacon
2015-03-17 18:49     ` Will Deacon
2015-03-10 15:18 ` [PATCH 3/5] arm-cci: Get rid of secure transactions for PMU driver Suzuki K. Poulose
2015-03-10 15:18   ` Suzuki K. Poulose
2015-03-10 15:18   ` Suzuki K. Poulose
2015-03-17  9:51   ` [UPDATED] " Suzuki K. Poulose
2015-03-17  9:51     ` Suzuki K. Poulose
2015-03-19 17:25     ` Mark Rutland
2015-03-19 17:25       ` Mark Rutland
2015-03-19 17:32     ` Mark Rutland
2015-03-19 17:32       ` Mark Rutland
2015-03-19 17:32       ` Mark Rutland
2015-03-19 17:38       ` Sudeep Holla
2015-03-19 17:38         ` Sudeep Holla
2015-03-19 17:52         ` Suzuki K. Poulose
2015-03-19 17:52           ` Suzuki K. Poulose
2015-03-19 17:54           ` Mark Rutland
2015-03-19 17:54             ` Mark Rutland
2015-03-19 17:54             ` Mark Rutland
2015-03-10 15:18 ` [PATCH 4/5] arm-cci: Split the code for PMU vs driver support Suzuki K. Poulose
2015-03-10 15:18   ` Suzuki K. Poulose
2015-03-10 16:24   ` Sudeep Holla
2015-03-10 16:24     ` Sudeep Holla
2015-03-10 16:24     ` Sudeep Holla
2015-03-10 15:18 ` [PATCH 5/5] arm-cci: Fix CCI PMU event validation Suzuki K. Poulose
2015-03-10 15:18   ` Suzuki K. Poulose
2015-03-17 18:52   ` Will Deacon [this message]
2015-03-17 18:52     ` Will Deacon
2015-03-17 18:52     ` Will Deacon
2015-03-10 16:09 ` [PATCHv3 0/5] arm-cci400: PMU monitoring support on ARM64 Nicolas Pitre
2015-03-10 16:09   ` Nicolas Pitre
2015-03-10 16:09   ` Nicolas Pitre
2015-03-10 16:11   ` Suzuki K. Poulose
2015-03-10 16:11     ` Suzuki K. Poulose
2015-03-10 16:21 ` Sudeep Holla
2015-03-10 16:21   ` Sudeep Holla
2015-03-10 16:24   ` Suzuki K. Poulose
2015-03-10 16:24     ` Suzuki K. Poulose
2015-03-11 11:40 ` Punit Agrawal
2015-03-11 11:40   ` Punit Agrawal
2015-03-11 11:40   ` Punit Agrawal
2015-03-17 18:54 ` Will Deacon
2015-03-17 18:54   ` Will Deacon
2015-03-18 10:09   ` Suzuki K. Poulose
2015-03-18 10:09     ` Suzuki K. Poulose
  -- strict thread matches above, loose matches on Subject: below --
2015-03-18 12:24 [PATCHv4 " Suzuki K. Poulose
2015-03-18 12:24 ` [PATCH 5/5] arm-cci: Fix CCI PMU event validation Suzuki K. Poulose
2015-03-02 11:29 [PATCH v2 0/5] arm-cci400: PMU monitoring support on ARM64 Suzuki K. Poulose
2015-03-02 11:29 ` [PATCH 5/5] arm-cci: Fix CCI PMU event validation Suzuki K. Poulose
2015-03-02 11:29   ` Suzuki K. Poulose
2015-03-02 11:29   ` Suzuki K. Poulose

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20150317185247.GE8399@arm.com \
    --to=will.deacon@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.