diff for duplicates of <20150320061102.14355.19921.stgit@mcwayne> diff --git a/a/1.txt b/N1/1.txt index a851736..f1978f2 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,4 +1,4 @@ -From a hardware SoC integration point of view, the offsets of the +>From a hardware SoC integration point of view, the offsets of the Tegra AHB registers that are currently defined in tegra-ahb.c macros are all off by four bytes. Similarly, the starting address of this IP block in our existing DT files is also off by four bytes. Since we @@ -10,15 +10,15 @@ will allow the offset to be removed for DT 'compatible' strings used in future DT files for newer Tegra chips that the kernel does not yet support. -Signed-off-by: Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org> -Cc: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> -Cc: Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> -Cc: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> -Cc: Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> -Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> -Cc: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> -Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -Acked-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +Signed-off-by: Paul Walmsley <paul@pwsan.com> +Cc: Paul Walmsley <pwalmsley@nvidia.com> +Cc: Alexandre Courbot <gnurou@gmail.com> +Cc: Hiroshi DOYU <hdoyu@nvidia.com> +Cc: Russell King <linux@arm.linux.org.uk> +Cc: Stephen Warren <swarren@wwwdotorg.org> +Cc: Thierry Reding <thierry.reding@gmail.com> +Cc: linux-kernel at vger.kernel.org +Acked-by: Stephen Warren <swarren@nvidia.com> --- drivers/amba/tegra-ahb.c | 63 +++++++++++++++++++++++----------------------- 1 file changed, 32 insertions(+), 31 deletions(-) diff --git a/a/content_digest b/N1/content_digest index c932bef..2c1f5e3 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,20 +1,11 @@ "ref\020150320061102.14355.4781.stgit@mcwayne\0" - "From\0Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org>\0" + "From\0paul@pwsan.com (Paul Walmsley)\0" "Subject\0[PATCH v3 1/3] amba: tegra-ahb: fix register offsets in the macros\0" "Date\0Fri, 20 Mar 2015 00:11:02 -0600\0" - "To\0linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" - " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0" - "Cc\0Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>" - Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> - Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> - Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - " Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" - "From a hardware SoC integration point of view, the offsets of the\n" + ">From a hardware SoC integration point of view, the offsets of the\n" "Tegra AHB registers that are currently defined in tegra-ahb.c macros\n" "are all off by four bytes. Similarly, the starting address of this IP\n" "block in our existing DT files is also off by four bytes. Since we\n" @@ -26,15 +17,15 @@ "in future DT files for newer Tegra chips that the kernel does not yet\n" "support.\n" "\n" - "Signed-off-by: Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org>\n" - "Cc: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" - "Cc: Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" - "Cc: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" - "Cc: Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>\n" - "Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\n" - "Cc: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" - "Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" - "Acked-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "Signed-off-by: Paul Walmsley <paul@pwsan.com>\n" + "Cc: Paul Walmsley <pwalmsley@nvidia.com>\n" + "Cc: Alexandre Courbot <gnurou@gmail.com>\n" + "Cc: Hiroshi DOYU <hdoyu@nvidia.com>\n" + "Cc: Russell King <linux@arm.linux.org.uk>\n" + "Cc: Stephen Warren <swarren@wwwdotorg.org>\n" + "Cc: Thierry Reding <thierry.reding@gmail.com>\n" + "Cc: linux-kernel at vger.kernel.org\n" + "Acked-by: Stephen Warren <swarren@nvidia.com>\n" "---\n" " drivers/amba/tegra-ahb.c | 63 +++++++++++++++++++++++-----------------------\n" " 1 file changed, 32 insertions(+), 31 deletions(-)\n" @@ -147,4 +138,4 @@ " \n" #ifdef CONFIG_TEGRA_IOMMU_SMMU -5afd73c2fd2b216df8327a8bff3e0e1584c273e1e9dc92493a21638a2e6799de +9fd3a5a0e9cf7ff324fe2fab6ae1ce345c4b4242fb30037229c566dc15b278ea
diff --git a/a/1.txt b/N2/1.txt index a851736..4b7ae2c 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,4 +1,4 @@ -From a hardware SoC integration point of view, the offsets of the +>From a hardware SoC integration point of view, the offsets of the Tegra AHB registers that are currently defined in tegra-ahb.c macros are all off by four bytes. Similarly, the starting address of this IP block in our existing DT files is also off by four bytes. Since we @@ -10,15 +10,15 @@ will allow the offset to be removed for DT 'compatible' strings used in future DT files for newer Tegra chips that the kernel does not yet support. -Signed-off-by: Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org> -Cc: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> -Cc: Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> -Cc: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> -Cc: Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> -Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> -Cc: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> -Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -Acked-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +Signed-off-by: Paul Walmsley <paul@pwsan.com> +Cc: Paul Walmsley <pwalmsley@nvidia.com> +Cc: Alexandre Courbot <gnurou@gmail.com> +Cc: Hiroshi DOYU <hdoyu@nvidia.com> +Cc: Russell King <linux@arm.linux.org.uk> +Cc: Stephen Warren <swarren@wwwdotorg.org> +Cc: Thierry Reding <thierry.reding@gmail.com> +Cc: linux-kernel@vger.kernel.org +Acked-by: Stephen Warren <swarren@nvidia.com> --- drivers/amba/tegra-ahb.c | 63 +++++++++++++++++++++++----------------------- 1 file changed, 32 insertions(+), 31 deletions(-) diff --git a/a/content_digest b/N2/content_digest index c932bef..7a0b6ec 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,20 +1,20 @@ "ref\020150320061102.14355.4781.stgit@mcwayne\0" - "From\0Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org>\0" + "From\0Paul Walmsley <paul@pwsan.com>\0" "Subject\0[PATCH v3 1/3] amba: tegra-ahb: fix register offsets in the macros\0" "Date\0Fri, 20 Mar 2015 00:11:02 -0600\0" - "To\0linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" - " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0" - "Cc\0Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>" - Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> - Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> - Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - " Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" + "To\0linux-tegra@vger.kernel.org" + " linux-arm-kernel@lists.infradead.org\0" + "Cc\0Alexandre Courbot <gnurou@gmail.com>" + Paul Walmsley <pwalmsley@nvidia.com> + Russell King <linux@arm.linux.org.uk> + Stephen Warren <swarren@wwwdotorg.org> + linux-kernel@vger.kernel.org + Thierry Reding <thierry.reding@gmail.com> + Stephen Warren <swarren@nvidia.com> + " Hiroshi DOYU <hdoyu@nvidia.com>\0" "\00:1\0" "b\0" - "From a hardware SoC integration point of view, the offsets of the\n" + ">From a hardware SoC integration point of view, the offsets of the\n" "Tegra AHB registers that are currently defined in tegra-ahb.c macros\n" "are all off by four bytes. Similarly, the starting address of this IP\n" "block in our existing DT files is also off by four bytes. Since we\n" @@ -26,15 +26,15 @@ "in future DT files for newer Tegra chips that the kernel does not yet\n" "support.\n" "\n" - "Signed-off-by: Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org>\n" - "Cc: Paul Walmsley <pwalmsley-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" - "Cc: Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" - "Cc: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" - "Cc: Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>\n" - "Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\n" - "Cc: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" - "Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" - "Acked-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "Signed-off-by: Paul Walmsley <paul@pwsan.com>\n" + "Cc: Paul Walmsley <pwalmsley@nvidia.com>\n" + "Cc: Alexandre Courbot <gnurou@gmail.com>\n" + "Cc: Hiroshi DOYU <hdoyu@nvidia.com>\n" + "Cc: Russell King <linux@arm.linux.org.uk>\n" + "Cc: Stephen Warren <swarren@wwwdotorg.org>\n" + "Cc: Thierry Reding <thierry.reding@gmail.com>\n" + "Cc: linux-kernel@vger.kernel.org\n" + "Acked-by: Stephen Warren <swarren@nvidia.com>\n" "---\n" " drivers/amba/tegra-ahb.c | 63 +++++++++++++++++++++++-----------------------\n" " 1 file changed, 32 insertions(+), 31 deletions(-)\n" @@ -147,4 +147,4 @@ " \n" #ifdef CONFIG_TEGRA_IOMMU_SMMU -5afd73c2fd2b216df8327a8bff3e0e1584c273e1e9dc92493a21638a2e6799de +5c4feb5625bbb569d2ac5f2ac57aa831ff9a12f4c4b7e6d74aa47636f2d43474
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