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Date:   Tue, 31 Mar 2015 14:17:58 +0200
From:   Ralf Baechle <ralf@linux-mips.org>
To:     Joshua Kinard <kumba@gentoo.org>
Cc:     Linux MIPS List <linux-mips@linux-mips.org>
Subject: Re: [PATCH v2] MIPS: R10000: Split R10000 definitions from R12000
 and up
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On Wed, Jan 21, 2015 at 07:51:43AM -0500, Joshua Kinard wrote:

>  up
> Content-Type: text/plain; charset=utf-8
> 
> From: Joshua Kinard <kumba@gentoo.org>
> 
> This patch splits the old R10000 definitions so that the R10000_LLSC_WAR can be
> disabled and -mno-fix-r10000 passed to CFLAGS for systems running R12000 CPUs
> and greater.  This allows the kernel to build without branch-likely
> instructions, which are considered deprecated in current MIPS implementations.
>  Only R10000 systems with R2.6 and lower CPUs require branch-likely to work
> around a known hardware errata item.

The kernel doesn't use -mfix-r10000 rsp. -mno-fix-r10000 or any code that
would rely on the default setting for this option.  The kernel rather
opencodes all these atomic sequences in inline assembler.

Only platforms which are known to be equipped with R10000 v2.6 processors
enable R10000_LLSC_WAR and I've done so quite intentionally not just for
some CPU configuration but the entire platforms which at this time are IP27
and IP28.

Another mysterious question of course is why
arch/mips/include/asm/mach-pmcs-msp71xx/msp_regops.h caters for the case
where R10000_LLSC_WAR is enabled.  It won't be for that platform.

  Ralf