From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bob Copeland Date: Fri, 3 Apr 2015 07:48:59 -0400 Subject: [ath9k-devel] ar9330 autosleep In-Reply-To: <21789.63534.378525.962484@gargle.gargle.HOWL> References: <20150402181745.GB2953@localhost> <21789.63534.378525.962484@gargle.gargle.HOWL> Message-ID: <20150403114859.GA6339@localhost> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: ath9k-devel@lists.ath9k.org On Fri, Apr 03, 2015 at 07:47:18AM +0530, Sujith Manoharan wrote: > Adrian Chadd wrote: > > I'm still debugging some of the sleep stuff with the AR9380 on > > FreeBSD. The later chips do the right thing, but the AR9380 beacon > > programming for /some/ reason is not hearing beacons in network sleep > > mode and eventually the BMISS interrupts cause a rescan/reassociation. > > IT doesn't happen on the later chips (AR9485, AR9462, .etc.) sigh. > > Relying on the HW TIM interrupt wasn't reliable, IIRC. Instead of > using ATH9K_INT_TIM to process a beacon which has the TIM bit set > for our station, ath9k uses ATH9K_INT_TIM_TIMER. AR_TIM_TIMER_EN > is always enabled in station mode, so power-saving has lots of > room for improvement, since we completely ignore DTIM and always > wake up to receive every beacon. AR_TIM_TIMER_EN is set, but the ATH9K_INT_TIM_TIMER bit seems to be masked off[1], and the autosleep check in this code in ath_isr would prevent it doing anything anyway: if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) if (status & ATH9K_INT_TIM_TIMER) { if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle)) goto chip_reset; /* Clear RxAbort bit so that we can * receive frames */ ath9k_setpower(sc, ATH9K_PM_AWAKE); spin_lock(&sc->sc_pm_lock); ath9k_hw_setrxabort(sc->sc_ah, 0); sc->ps_flags |= PS_WAIT_FOR_BEACON; spin_unlock(&sc->sc_pm_lock); } So I'm still missing the part where we wake hardware up on this version. It seemed to work for me though. [1] code that sets it in ath9k_enable_ps() is surrounded by !AUTOSLEEP capability check, also ar9003_mac.c is missing the part where we set TIM_TIMER bit in ISR status based on a generic timer interrupt. -- Bob Copeland %% http://bobcopeland.com/