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Date:   Tue, 7 Apr 2015 14:54:34 +0200
From:   Ralf Baechle <ralf@linux-mips.org>
To:     "Maciej W. Rozycki" <macro@linux-mips.org>
Cc:     linux-mips@linux-mips.org
Subject: Re: [PATCH 47/48] MIPS: Respect the ISA level in FCSR handling
Message-ID: <20150407125434.GA27914@linux-mips.org>
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On Fri, Apr 03, 2015 at 11:27:48PM +0100, Maciej W. Rozycki wrote:
> Date:   Fri, 3 Apr 2015 23:27:48 +0100 (BST)

> Index: linux/arch/mips/include/asm/fpu.h
> ===================================================================
> --- linux.orig/arch/mips/include/asm/fpu.h	2015-04-02 20:18:47.499480000 +0100
> +++ linux/arch/mips/include/asm/fpu.h	2015-04-02 20:27:59.745241000 +0100
> @@ -14,6 +14,7 @@
>  #include <linux/thread_info.h>
>  #include <linux/bitops.h>
>  
> +#include <asm/current.h>
>  #include <asm/mipsregs.h>
>  #include <asm/cpu.h>
>  #include <asm/cpu-features.h>

This is adding a 2nd inclusion of <asm/current.h>.  Will fix that.

  Ralf