From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chao Peng Subject: Re: [PATCH v4 09/12] x86: add scheduling support for Intel CAT Date: Fri, 10 Apr 2015 15:41:09 +0800 Message-ID: <20150410074109.GF3417@pengc-linux.bj.intel.com> References: <1428571105-3604-1-git-send-email-chao.p.peng@linux.intel.com> <1428571105-3604-10-git-send-email-chao.p.peng@linux.intel.com> <5526F948.3040103@citrix.com> Reply-To: Chao Peng Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <5526F948.3040103@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Andrew Cooper Cc: keir@xen.org, Ian.Campbell@citrix.com, stefano.stabellini@eu.citrix.com, Ian.Jackson@eu.citrix.com, xen-devel@lists.xen.org, will.auld@intel.com, JBeulich@suse.com, wei.liu2@citrix.com, dgdegra@tycho.nsa.gov List-Id: xen-devel@lists.xenproject.org On Thu, Apr 09, 2015 at 11:12:24PM +0100, Andrew Cooper wrote: > On 09/04/2015 10:18, Chao Peng wrote: > > On context switch, write the the domain's Class of Service(COS) to MSR > > IA32_PQR_ASSOC, to notify hardware to use the new COS. > > > > For performance reason, the socket number and COS mask for current cpu > > is also cached in the local per-CPU variable. > > > > Signed-off-by: Chao Peng > > --- > > Changes in v2: > > * merge common scheduling changes into scheduling improvement patch. > > * use readable expr for psra->cos_mask. > > --- > > xen/arch/x86/psr.c | 33 ++++++++++++++++++++++++++++++++- > > 1 file changed, 32 insertions(+), 1 deletion(-) > > > > diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c > > index 5247bcd..046229d 100644 > > --- a/xen/arch/x86/psr.c > > +++ b/xen/arch/x86/psr.c > > @@ -37,6 +37,8 @@ struct psr_cat_socket_info { > > > > struct psr_assoc { > > uint64_t val; > > + unsigned int socket; > > psr_assoc is per-cpu. Why does it need to cache its own socket like this? > > If it does, please reorder socket and cos_mask to avoid the padding space. Just want to eliminate the need to perform 'cpu_to_socket(smp_processor_id())' for each context switch. Since it's cheap, I have no problem to not cache it here. Chao > > > + uint64_t cos_mask; > > };