From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932632AbbDJWQg (ORCPT ); Fri, 10 Apr 2015 18:16:36 -0400 Received: from mail.skyhub.de ([78.46.96.112]:51387 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751560AbbDJWQd (ORCPT ); Fri, 10 Apr 2015 18:16:33 -0400 Date: Sat, 11 Apr 2015 00:14:18 +0200 From: Borislav Petkov To: Andi Kleen Cc: x86@kernel.org, luto@kernel.org, linux-kernel@vger.kernel.org, Andi Kleen Subject: Re: [PATCH 6/8] x86: Enumerate kernel FSGS capability in AT_HWCAP2 Message-ID: <20150410221418.GD28317@pd.tnic> References: <1428681033-1549-1-git-send-email-andi@firstfloor.org> <1428681033-1549-7-git-send-email-andi@firstfloor.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1428681033-1549-7-git-send-email-andi@firstfloor.org> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Apr 10, 2015 at 08:50:31AM -0700, Andi Kleen wrote: > From: Andi Kleen > > The kernel needs to explicitely enable RD/WRFSBASE to handle context > switch correctly. So the application needs to know if it can safely use > these instruction. Just looking at the CPUID bit is not enough because it > may be running in a kernel that does not enable the instructions. > > One way for the application would be to just try and catch the SIGILL. > But that is difficult to do in libraries which may not want > to overwrite the signal handlers of the main application. > > So we need to provide a way for the application to discover the kernel > capability. > > I used AT_HWCAP2 in the ELF aux vector which is already used by > PPC for similar things. We define a new Linux defined bitmap > returned in AT_HWCAP. Currently it has only one bit set, > for kernel is FSGSBASE capable. > > The application can then access it manually or using > the getauxval() function in newer glibc. > > Signed-off-by: Andi Kleen > --- > arch/x86/include/asm/elf.h | 7 +++++++ > arch/x86/include/uapi/asm/hwcap.h | 7 +++++++ > arch/x86/kernel/cpu/common.c | 7 ++++++- > 3 files changed, 20 insertions(+), 1 deletion(-) > create mode 100644 arch/x86/include/uapi/asm/hwcap.h > > diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h > index ca3347a..47dac31 100644 > --- a/arch/x86/include/asm/elf.h > +++ b/arch/x86/include/asm/elf.h > @@ -257,6 +257,13 @@ extern int force_personality32; > > #define ELF_HWCAP (boot_cpu_data.x86_capability[0]) > > +extern unsigned kernel_enabled_features; > + > +/* HWCAP2 supplies kernel enabled CPU feature, so that the application > + can know that it can safely use them. The bits are defined in > + uapi/asm/hwcap.h. */ Comments formatting. > +#define ELF_HWCAP2 kernel_enabled_features; > + > /* This yields a string that ld.so will use to load implementation > specific libraries for optimization. This is more specific in > intent than poking at uname or /proc/cpuinfo. > diff --git a/arch/x86/include/uapi/asm/hwcap.h b/arch/x86/include/uapi/asm/hwcap.h > new file mode 100644 > index 0000000..d9c54f8 > --- /dev/null > +++ b/arch/x86/include/uapi/asm/hwcap.h > @@ -0,0 +1,7 @@ > +#ifndef _ASM_HWCAP_H > +#define _ASM_HWCAP_H 1 > + > +#define HWCAP2_FSGSBASE (1 << 0) /* Kernel enabled RD/WR FS/GS BASE */ BIT() > +/* upto bit 31 free */ > + > +#endif > diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c > index 7df88a3..81186cb 100644 > --- a/arch/x86/kernel/cpu/common.c > +++ b/arch/x86/kernel/cpu/common.c > @@ -34,6 +34,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -49,6 +50,8 @@ > > #include "cpu.h" > > +unsigned kernel_enabled_features __read_mostly; > + > /* all of these masks are initialized in setup_cpu_local_masks() */ > cpumask_var_t cpu_initialized_mask; > cpumask_var_t cpu_callout_mask; > @@ -958,8 +961,10 @@ static void identify_cpu(struct cpuinfo_x86 *c) > numa_add_cpu(smp_processor_id()); > #endif > > - if (cpu_has(c, X86_FEATURE_FSGSBASE)) > + if (cpu_has(c, X86_FEATURE_FSGSBASE)) { static_cpu_has_safe() -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. --