From: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org>
To: Zhoupeng <zhoupeng1982@qq.com>
Cc: xenomai <xenomai@xenomai.org>
Subject: Re: [Xenomai] Rtnet e1000e 82583: slow writel(tx_ring->tail), takes above 1us?
Date: Thu, 16 Apr 2015 16:46:38 +0200 [thread overview]
Message-ID: <20150416144638.GE1589@hermes.click-hack.org> (raw)
In-Reply-To: <tencent_2DCE8D1A1206C27E7BBEB0F4@qq.com>
On Thu, Apr 16, 2015 at 10:39:59PM +0800, Zhoupeng wrote:
> >> This is just MMIO write to 82583, of course MMIO is uncache.
> >> And PCIE ASPM is disabled, so L0s is not the problem.
> >>
> >> I think PCIE Memory Write TLPs is fast enough, but why spend so much time?
>
> >There is an interesting article that may be relevant to this issue
> >
> >"PCI Express as a Killer of Software-based Real-Time Ethernet"
>
> I have read the article carefully.
> The author don't mention PCIE ASPM, Latency will be better by disable it.
>
> Every rt_dev_sendmsg will trigger one writel(tx_ring->tail) in Rtnet.
> As the "writel" is time expensive, improvement may be done to Rtnet:
> using rtskb to buffer multiple packets, and using one IOCTL to trigger "writel".
Patches welcome.
--
Gilles.
next prev parent reply other threads:[~2015-04-16 14:46 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-16 12:26 [Xenomai] Rtnet e1000e 82583: slow writel(tx_ring->tail), takes above 1us? Mariusz Janiak
2015-04-16 14:39 ` Zhoupeng
2015-04-16 14:46 ` Gilles Chanteperdrix [this message]
2015-04-16 19:15 ` Gilles Chanteperdrix
-- strict thread matches above, loose matches on Subject: below --
2015-04-16 11:30 Zhoupeng
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