diff for duplicates of <20150504122303.GD4096@pd.tnic> diff --git a/a/1.txt b/N1/1.txt index 8afb782..2f9388d 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -53,7 +53,8 @@ On Wed, Apr 29, 2015 at 02:44:07PM -0700, Luis R. Rodriguez wrote: > +Richard Gooch <rgooch@atnf.csiro.au> - 3 Jun 1999 > +Luis R. Rodriguez <mcgrof@do-not-panic.com> - April 9, 2015 > + -> +=======================================> +Phasing MTRR use +> +=============================================================================== +> +Phasing MTRR use "Phasing out...". @@ -65,7 +66,8 @@ On Wed, Apr 29, 2015 at 02:44:07PM -0700, Luis R. Rodriguez wrote: > + > +For details refer to Documentation/x86/pat.txt. > + -> +=======================================> +> +=============================================================================== +> > On Intel P6 family processors (Pentium Pro, Pentium II and later) > the Memory Type Range Registers (MTRRs) may be used to control > diff --git a/Documentation/x86/pat.txt b/Documentation/x86/pat.txt diff --git a/a/content_digest b/N1/content_digest index 9a2290c..62945a0 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,7 +2,7 @@ "ref\01430343851-967-3-git-send-email-mcgrof@do-not-panic.com\0" "From\0Borislav Petkov <bp@alien8.de>\0" "Subject\0Re: [PATCH v4 2/6] x86: document WC MTRR effects on PAT / non-PAT pages\0" - "Date\0Mon, 04 May 2015 12:23:03 +0000\0" + "Date\0Mon, 4 May 2015 14:23:03 +0200\0" "To\0Luis R. Rodriguez <mcgrof@do-not-panic.com>\0" "Cc\0mingo@elte.hu" tglx@linutronix.de @@ -89,7 +89,8 @@ "> +Richard Gooch <rgooch@atnf.csiro.au> - 3 Jun 1999\n" "> +Luis R. Rodriguez <mcgrof@do-not-panic.com> - April 9, 2015\n" "> +\n" - "> +=======================================> +Phasing MTRR use\n" + "> +===============================================================================\n" + "> +Phasing MTRR use\n" "\n" "\"Phasing out...\".\n" "\n" @@ -101,7 +102,8 @@ "> +\n" "> +For details refer to Documentation/x86/pat.txt.\n" "> +\n" - "> +=======================================> \n" + "> +===============================================================================\n" + "> \n" "> On Intel P6 family processors (Pentium Pro, Pentium II and later)\n" "> the Memory Type Range Registers (MTRRs) may be used to control\n" "> diff --git a/Documentation/x86/pat.txt b/Documentation/x86/pat.txt\n" @@ -193,4 +195,4 @@ "ECO tip #101: Trim your mails when you reply.\n" -- -49f02e3bbbe0df61311b16eba3f0d37ad2ac9e1ec62525a2f8bf472006a57ace +3cd4207bab5f878dfb77eee386e45cdf86ecb3dd49feff154acdabfae00ca324
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