From: Marek Vasut <marex@denx.de>
To: Michal Suchanek <hramrach@gmail.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
David Woodhouse <dwmw2@infradead.org>,
Rafa?? Mi??ecki <zajec5@gmail.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-mtd@lists.infradead.org,
"grmoore@altera.com" <grmoore@altera.com>,
Brian Norris <computersforpeace@gmail.com>,
Ben Hutchings <ben@decadent.org.uk>,
Alison Chaiken <alison_chaiken@mentor.com>,
"Bean Huo \(beanhuo\)" <beanhuo@micron.com>
Subject: Re: [PATCH 3/3] MTD: spi-nor: add flag to not use sector erase.
Date: Mon, 4 May 2015 14:12:46 +0200 [thread overview]
Message-ID: <201505041412.46195.marex@denx.de> (raw)
In-Reply-To: <CAOMqctTL-y+YxnxuBX8r4osgbz3_+xJ2T2AfCj4idxMo3tCo8g@mail.gmail.com>
On Monday, May 04, 2015 at 01:11:03 PM, Michal Suchanek wrote:
> Hello,
Hi!
> On 1 May 2015 at 16:20, Marek Vasut <marex@denx.de> wrote:
> > On Friday, May 01, 2015 at 09:05:15 AM, Michal Suchanek wrote:
> >> On 1 May 2015 at 01:13, Marek Vasut <marex@denx.de> wrote:
> >> I can determine it for this particular chip. However, when the vendor
> >> datasheet says the block is 64/32K it might mean that chips with this
> >> ID can have either block size.
> >
> > http://www.chingistek.com/img/Product_Files/Pm25LD010020datasheet%20v04.p
> > df page 21:
> >
> > SECTOR_ER (20h) erases 4kByte sector.
> > BLOCK_ER (d8h) erases 64kByte sector.
> >
> > http://www.gigadevice.com/product/download/366.html?locale=en_US
> > page 27-28:
> >
> > Sector Erase (SE) (20h) erases 4kByte sector
> > 64KB Block Erase (BE) (d8h) erases 64kByte sector
>
> It's pretty much the same as the datasheet I used
> http://www.elm-tech.com/en/products/spi-flash-memory/gd25q41/gd25q41.pdf
>
> It mentions both
> 32KB Block Erase (BE) (52H)
> and
> 64KB Block Erase (BE) (D8H)
The SPI NOR framework will use 0xbe opcode, no problem.
> So the chip probably tries its best to be compatible with any command
> set and this last patch is not needed. The memory organization table
> on page 7 is not all that reassuring, though.
Which exact part do you refer to please ?
Best regards,
Marek Vasut
WARNING: multiple messages have this Message-ID (diff)
From: Marek Vasut <marex@denx.de>
To: Michal Suchanek <hramrach@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
"Rafa?? Mi??ecki" <zajec5@gmail.com>,
Alison Chaiken <alison_chaiken@mentor.com>,
Ben Hutchings <ben@decadent.org.uk>,
Geert Uytterhoeven <geert+renesas@glider.be>,
"Bean Huo (beanhuo)" <beanhuo@micron.com>,
"grmoore@altera.com" <grmoore@altera.com>,
linux-mtd@lists.infradead.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/3] MTD: spi-nor: add flag to not use sector erase.
Date: Mon, 4 May 2015 14:12:46 +0200 [thread overview]
Message-ID: <201505041412.46195.marex@denx.de> (raw)
In-Reply-To: <CAOMqctTL-y+YxnxuBX8r4osgbz3_+xJ2T2AfCj4idxMo3tCo8g@mail.gmail.com>
On Monday, May 04, 2015 at 01:11:03 PM, Michal Suchanek wrote:
> Hello,
Hi!
> On 1 May 2015 at 16:20, Marek Vasut <marex@denx.de> wrote:
> > On Friday, May 01, 2015 at 09:05:15 AM, Michal Suchanek wrote:
> >> On 1 May 2015 at 01:13, Marek Vasut <marex@denx.de> wrote:
> >> I can determine it for this particular chip. However, when the vendor
> >> datasheet says the block is 64/32K it might mean that chips with this
> >> ID can have either block size.
> >
> > http://www.chingistek.com/img/Product_Files/Pm25LD010020datasheet%20v04.p
> > df page 21:
> >
> > SECTOR_ER (20h) erases 4kByte sector.
> > BLOCK_ER (d8h) erases 64kByte sector.
> >
> > http://www.gigadevice.com/product/download/366.html?locale=en_US
> > page 27-28:
> >
> > Sector Erase (SE) (20h) erases 4kByte sector
> > 64KB Block Erase (BE) (d8h) erases 64kByte sector
>
> It's pretty much the same as the datasheet I used
> http://www.elm-tech.com/en/products/spi-flash-memory/gd25q41/gd25q41.pdf
>
> It mentions both
> 32KB Block Erase (BE) (52H)
> and
> 64KB Block Erase (BE) (D8H)
The SPI NOR framework will use 0xbe opcode, no problem.
> So the chip probably tries its best to be compatible with any command
> set and this last patch is not needed. The memory organization table
> on page 7 is not all that reassuring, though.
Which exact part do you refer to please ?
Best regards,
Marek Vasut
next prev parent reply other threads:[~2015-05-04 12:59 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-30 21:42 [PATCH 0/3] Minor fix and new Chip IDs for spi-nor Michal Suchanek
2015-04-30 13:33 ` [PATCH 1/3] MTD: m25p80: fix write return value Michal Suchanek
2015-04-30 23:09 ` Marek Vasut
2015-04-30 23:09 ` Marek Vasut
2015-05-20 23:45 ` Brian Norris
2015-05-20 23:45 ` Brian Norris
2015-05-21 8:33 ` Michal Suchanek
2015-05-21 8:33 ` Michal Suchanek
2015-04-30 19:02 ` [PATCH 2/3] MTD: spi-nor: Add Pm25LD020 and GD25Q41B chip ID Michal Suchanek
2015-04-30 21:13 ` [PATCH 3/3] MTD: spi-nor: add flag to not use sector erase Michal Suchanek
2015-04-30 23:13 ` Marek Vasut
2015-04-30 23:13 ` Marek Vasut
2015-05-01 7:05 ` Michal Suchanek
2015-05-01 7:05 ` Michal Suchanek
2015-05-01 10:50 ` Jonas Gorski
2015-05-01 10:50 ` Jonas Gorski
2015-05-01 14:20 ` Marek Vasut
2015-05-01 14:20 ` Marek Vasut
2015-05-04 11:11 ` Michal Suchanek
2015-05-04 11:11 ` Michal Suchanek
2015-05-04 12:12 ` Marek Vasut [this message]
2015-05-04 12:12 ` Marek Vasut
2015-05-04 13:18 ` Michal Suchanek
2015-05-04 13:18 ` Michal Suchanek
2015-05-04 13:35 ` Marek Vasut
2015-05-04 13:35 ` Marek Vasut
2015-05-04 13:39 ` Michal Suchanek
2015-05-04 13:39 ` Michal Suchanek
2015-05-04 14:11 ` Marek Vasut
2015-05-04 14:11 ` Marek Vasut
2015-05-01 21:56 ` Rafał Miłecki
2015-05-01 21:56 ` Rafał Miłecki
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