diff for duplicates of <20150505171558.GO1550@arm.com> diff --git a/a/1.txt b/N1/1.txt index 4b80c75..d828a29 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,14 +1,14 @@ -On Tue, May 05, 2015 at 06:09:57PM +0100, André Hentschel wrote: +On Tue, May 05, 2015 at 06:09:57PM +0100, Andr? Hentschel wrote: > Am 05.05.2015 um 12:51 schrieb Will Deacon: -> > On Sun, May 03, 2015 at 05:24:18PM +0100, André Hentschel wrote: -> >> From: André Hentschel <nerv@dawncrow.de> +> > On Sun, May 03, 2015 at 05:24:18PM +0100, Andr? Hentschel wrote: +> >> From: Andr? Hentschel <nerv@dawncrow.de> > >> > >> Since commit a4780adeefd042482f624f5e0d577bf9cdcbb760 the user writeable TLS > >> register on ARM is preserved per thread. > >> > >> This patch does it analogous to the ARM patch, but for compat mode on ARM64. > >> -> >> Signed-off-by: André Hentschel <nerv@dawncrow.de> +> >> Signed-off-by: Andr? Hentschel <nerv@dawncrow.de> > >> Cc: Will Deacon <will.deacon@arm.com> > >> Cc: Jonathan Austin <jonathan.austin@arm.com> > >> @@ -20,7 +20,7 @@ On Tue, May 05, 2015 at 06:09:57PM +0100, André Hentschel wrote: > > anybody actually using that? > > Yes, Windows ARM binaries are the well known use case, but also the compat -> mode should do what the arm kernel is doing I’d think and the code wasn't +> mode should do what the arm kernel is doing I?d think and the code wasn't > adjusted yet. Sure, I was just curious. diff --git a/a/content_digest b/N1/content_digest index 3b6b142..dbb0801 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,31 +1,23 @@ "ref\055464BB2.7030401@dawncrow.de\0" "ref\020150505105111.GB1550@arm.com\0" "ref\05548F965.9070302@dawncrow.de\0" - "From\0Will Deacon <will.deacon@arm.com>\0" - "Subject\0Re: [PATCH] arm64: Preserve the user r/w register tpidr_el0 on context switch and fork in compat mode\0" + "From\0will.deacon@arm.com (Will Deacon)\0" + "Subject\0[PATCH] arm64: Preserve the user r/w register tpidr_el0 on context switch and fork in compat mode\0" "Date\0Tue, 5 May 2015 18:15:58 +0100\0" - "To\0Andr\303\251 Hentschel <nerv@dawncrow.de>\0" - "Cc\0linux-arch@vger.kernel.org <linux-arch@vger.kernel.org>" - Russell King - ARM Linux <linux@arm.linux.org.uk> - linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> - linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> - gregkh@linuxfoundation.org <gregkh@linuxfoundation.org> - Jonathan Austin <Jonathan.Austin@arm.com> - Nathan Lynch <nathan_lynch@mentor.com> - " Catalin Marinas <Catalin.Marinas@arm.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" - "On Tue, May 05, 2015 at 06:09:57PM +0100, Andr\303\251 Hentschel wrote:\n" + "On Tue, May 05, 2015 at 06:09:57PM +0100, Andr? Hentschel wrote:\n" "> Am 05.05.2015 um 12:51 schrieb Will Deacon:\n" - "> > On Sun, May 03, 2015 at 05:24:18PM +0100, Andr\303\251 Hentschel wrote:\n" - "> >> From: Andr\303\251 Hentschel <nerv@dawncrow.de>\n" + "> > On Sun, May 03, 2015 at 05:24:18PM +0100, Andr? Hentschel wrote:\n" + "> >> From: Andr? Hentschel <nerv@dawncrow.de>\n" "> >>\n" "> >> Since commit a4780adeefd042482f624f5e0d577bf9cdcbb760 the user writeable TLS\n" "> >> register on ARM is preserved per thread.\n" "> >>\n" "> >> This patch does it analogous to the ARM patch, but for compat mode on ARM64.\n" "> >>\n" - "> >> Signed-off-by: Andr\303\251 Hentschel <nerv@dawncrow.de>\n" + "> >> Signed-off-by: Andr? Hentschel <nerv@dawncrow.de>\n" "> >> Cc: Will Deacon <will.deacon@arm.com>\n" "> >> Cc: Jonathan Austin <jonathan.austin@arm.com> \n" "> >>\n" @@ -37,7 +29,7 @@ "> > anybody actually using that?\n" "> \n" "> Yes, Windows ARM binaries are the well known use case, but also the compat\n" - "> mode should do what the arm kernel is doing I\342\200\231d think and the code wasn't\n" + "> mode should do what the arm kernel is doing I?d think and the code wasn't\n" "> adjusted yet.\n" "\n" "Sure, I was just curious.\n" @@ -55,4 +47,4 @@ "\n" Will -b36b1f9e898bb9254b2bf836714a287f7ac36c9af54d220e628fb2ba63ba21b6 +2aab2d3e322164d914eacc064ae630d9d6487db5dfe9a32a9d51c84adf0674b2
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