From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Edgar E. Iglesias" Subject: Re: [PATCH v4 0/3] Set SMMU s2 input-size based on p2m tables Date: Wed, 6 May 2015 19:17:29 +1000 Message-ID: <20150506091729.GA13061@toto> References: <1430444419-11564-1-git-send-email-edgar.iglesias@gmail.com> <1430831867.2660.89.camel@citrix.com> <20150506032635.GT10142@toto> <1430902497.2660.158.camel@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <1430902497.2660.158.camel@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Campbell Cc: julien.grall@citrix.com, tim@xen.org, edgar.iglesias@xilinx.com, stefano.stabellini@citrix.com, xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org On Wed, May 06, 2015 at 09:54:57AM +0100, Ian Campbell wrote: > On Wed, 2015-05-06 at 13:26 +1000, Edgar E. Iglesias wrote: > > On Tue, May 05, 2015 at 02:17:47PM +0100, Ian Campbell wrote: > > > On Fri, 2015-05-01 at 11:40 +1000, Edgar E. Iglesias wrote: > > > > From: "Edgar E. Iglesias" > > > > > > > > Hi, > > > > > > > > This is a fix for the issue I'm seeing on ZynqMP with missmatched > > > > setup of the SMMU and the shared p2m page-tables with the CPU. > > > > > > Looking back at previous conversations it seems like your SMMU handles > > > fewer input bits than the second stage of the regular MMU, is that > > > right? > > > > It's the other way around. The SMMU handles up-to 48 bits S2 input addrs > > but the Cortex-A53 only does 40bit IPAs. > > Oops, I read backwards, thanks. > > Thinking about it some more I think more (at at least as) important as > the input IPA size is the page table format, specifically the starting > level (TCR.SL0) and the amount of concatenation at the root level (I > forget how that is specified I think it is implicit in the TCR.SL0 and > TCR.T0SZ?). If we are sharing page tables then they really ought to > match. Yes these are just as important. It just happens to get configured correctly for the HW we are using. BTW, I think it is indirectly computed from the startlevel, page-size and S2 input size. > That said I think your patch is a good start and rules out issues on at > least one axis, so it's worth doing. > > > > Is there an architectural constraint that bits(SMMU) <= bits(MMU-s2)? > > > > I'm not aware of any such constraints. In XEN, because we share page-tables > > between CPU and SMMUs, we need to make sure the SMMUs support the > > page-tables format and get configured accordingly. > > Right, it seems like we may eventually need to introduce the possibility > of not sharing the p2m depending on the circumstances as is done on x86. Yes. How would that work in practice? I guess some of the guests memory space would not be DMA:able? or would we allow some kind of dynamic mapping driven from the guest? Cheers, Edgar