diff for duplicates of <20150506170503.GF14922@arm.com> diff --git a/a/1.txt b/N1/1.txt index f62863e..8818dab 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,12 +1,12 @@ -On Sun, May 03, 2015 at 05:24:18PM +0100, André Hentschel wrote: -> From: André Hentschel <nerv@dawncrow.de> +On Sun, May 03, 2015 at 05:24:18PM +0100, Andr? Hentschel wrote: +> From: Andr? Hentschel <nerv@dawncrow.de> > > Since commit a4780adeefd042482f624f5e0d577bf9cdcbb760 the user writeable TLS > register on ARM is preserved per thread. > > This patch does it analogous to the ARM patch, but for compat mode on ARM64. > -> Signed-off-by: André Hentschel <nerv@dawncrow.de> +> Signed-off-by: Andr? Hentschel <nerv@dawncrow.de> > Cc: Will Deacon <will.deacon@arm.com> > Cc: Jonathan Austin <jonathan.austin@arm.com> > diff --git a/a/content_digest b/N1/content_digest index 876a955..52b6189 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,26 +1,19 @@ "ref\055464BB2.7030401@dawncrow.de\0" - "From\0Will Deacon <will.deacon@arm.com>\0" - "Subject\0Re: [PATCH] arm64: Preserve the user r/w register tpidr_el0 on context switch and fork in compat mode\0" + "From\0will.deacon@arm.com (Will Deacon)\0" + "Subject\0[PATCH] arm64: Preserve the user r/w register tpidr_el0 on context switch and fork in compat mode\0" "Date\0Wed, 6 May 2015 18:05:03 +0100\0" - "To\0Andr\303\251 Hentschel <nerv@dawncrow.de>\0" - "Cc\0linux-arch@vger.kernel.org <linux-arch@vger.kernel.org>" - Russell King - ARM Linux <linux@arm.linux.org.uk> - linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> - linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> - gregkh@linuxfoundation.org <gregkh@linuxfoundation.org> - Jonathan Austin <Jonathan.Austin@arm.com> - " Nathan Lynch <nathan_lynch@mentor.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" - "On Sun, May 03, 2015 at 05:24:18PM +0100, Andr\303\251 Hentschel wrote:\n" - "> From: Andr\303\251 Hentschel <nerv@dawncrow.de>\n" + "On Sun, May 03, 2015 at 05:24:18PM +0100, Andr? Hentschel wrote:\n" + "> From: Andr? Hentschel <nerv@dawncrow.de>\n" "> \n" "> Since commit a4780adeefd042482f624f5e0d577bf9cdcbb760 the user writeable TLS\n" "> register on ARM is preserved per thread.\n" "> \n" "> This patch does it analogous to the ARM patch, but for compat mode on ARM64.\n" "> \n" - "> Signed-off-by: Andr\303\251 Hentschel <nerv@dawncrow.de>\n" + "> Signed-off-by: Andr? Hentschel <nerv@dawncrow.de>\n" "> Cc: Will Deacon <will.deacon@arm.com>\n" "> Cc: Jonathan Austin <jonathan.austin@arm.com> \n" "> \n" @@ -113,4 +106,4 @@ "\n" Will -c2d6d173a0f098a702501244371d11cfa46ee89e4ce955c7246ade5d67347deb +ed70620f01d09d8076909294ff9ae74ac810ed5e7cf0735d6e91c5d160ca149e
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