diff for duplicates of <20150507135332.GN3162@dragon> diff --git a/a/1.txt b/N1/1.txt index a37d349..3c1df00 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,4 +1,4 @@ -On Wed, Apr 29, 2015 at 10:20:04PM +0800, Frank.Li@freescale.com wrote: +On Wed, Apr 29, 2015 at 10:20:04PM +0800, Frank.Li at freescale.com wrote: > From: Frank Li <Frank.Li@freescale.com> > > Add i.mx7d support: @@ -94,7 +94,7 @@ On Wed, Apr 29, 2015 at 10:20:04PM +0800, Frank.Li@freescale.com wrote: > + #address-cells = <1>; > + #size-cells = <0>; > + -> + cpu0: cpu@0 { +> + cpu0: cpu at 0 { > + compatible = "arm,cortex-a7"; > + device_type = "cpu"; > + reg = <0>; @@ -110,7 +110,7 @@ On Wed, Apr 29, 2015 at 10:20:04PM +0800, Frank.Li@freescale.com wrote: > + }; > + }; > + -> + intc: interrupt-controller@31001000 { +> + intc: interrupt-controller at 31001000 { > + compatible = "arm,cortex-a7-gic"; > + #interrupt-cells = <3>; > + interrupt-controller; @@ -141,14 +141,14 @@ On Wed, Apr 29, 2015 at 10:20:04PM +0800, Frank.Li@freescale.com wrote: > + interrupt-parent = <&intc>; > + ranges; > + -> + aips1: aips-bus@30000000 { +> + aips1: aips-bus at 30000000 { > + compatible = "fsl,aips-bus", "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0x30000000 0x400000>; > + ranges; > + -> + gpio1: gpio@30200000 { +> + gpio1: gpio at 30200000 { > + compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio"; > + reg = <0x30200000 0x10000>; > + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, /* GPIO1_INT15_0 */ @@ -159,7 +159,7 @@ On Wed, Apr 29, 2015 at 10:20:04PM +0800, Frank.Li@freescale.com wrote: > + #interrupt-cells = <2>; > + }; > + -> + gpio2: gpio@30210000 { +> + gpio2: gpio at 30210000 { > + compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio"; > + reg = <0x30210000 0x10000>; > + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, @@ -170,7 +170,7 @@ On Wed, Apr 29, 2015 at 10:20:04PM +0800, Frank.Li@freescale.com wrote: > + #interrupt-cells = <2>; > + }; > + -> + gpio3: gpio@30220000 { +> + gpio3: gpio at 30220000 { > + compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio"; > + reg = <0x30220000 0x10000>; > + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, @@ -181,7 +181,7 @@ On Wed, Apr 29, 2015 at 10:20:04PM +0800, Frank.Li@freescale.com wrote: > + #interrupt-cells = <2>; > + }; > + -> + gpio4: gpio@30230000 { +> + gpio4: gpio at 30230000 { > + compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio"; > + reg = <0x30230000 0x10000>; > + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, @@ -192,7 +192,7 @@ On Wed, Apr 29, 2015 at 10:20:04PM +0800, Frank.Li@freescale.com wrote: > + #interrupt-cells = <2>; > + }; > + -> + gpio5: gpio@30240000 { +> + gpio5: gpio at 30240000 { > + compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio"; > + reg = <0x30240000 0x10000>; > + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, @@ -209,7 +209,7 @@ Please make the indentation consistent with gpio1 ~ gpio4: > + #interrupt-cells = <2>; > + }; > + -> + gpio6: gpio@30250000 { +> + gpio6: gpio at 30250000 { > + compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio"; > + reg = <0x30250000 0x10000>; > + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, @@ -220,7 +220,7 @@ Please make the indentation consistent with gpio1 ~ gpio4: > + #interrupt-cells = <2>; > + }; > + -> + gpio7: gpio@30260000 { +> + gpio7: gpio at 30260000 { > + compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio"; > + reg = <0x30260000 0x10000>; > + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>, @@ -231,7 +231,7 @@ Please make the indentation consistent with gpio1 ~ gpio4: > + #interrupt-cells = <2>; > + }; > + -> + gpt1: gpt@302d0000 { +> + gpt1: gpt at 302d0000 { > + compatible = "fsl,imx7d-gpt", "fsl,imx31-gpt"; > + reg = <0x302d0000 0x10000>; > + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; @@ -240,7 +240,7 @@ Please make the indentation consistent with gpio1 ~ gpio4: > + clock-names = "ipg", "per"; > + }; > + -> + gpt2: gpt@302e0000 { +> + gpt2: gpt at 302e0000 { > + compatible = "fsl,imx7d-gpt", "fsl,imx31-gpt"; > + reg = <0x302e0000 0x10000>; > + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; @@ -250,7 +250,7 @@ Please make the indentation consistent with gpio1 ~ gpio4: > + status = "disabled"; > + }; > + -> + gpt3: gpt@302f0000 { +> + gpt3: gpt at 302f0000 { > + compatible = "fsl,imx7d-gpt", "fsl,imx31-gpt"; > + reg = <0x302f0000 0x10000>; > + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; @@ -260,7 +260,7 @@ Please make the indentation consistent with gpio1 ~ gpio4: > + status = "disabled"; > + }; > + -> + gpt4: gpt@30300000 { +> + gpt4: gpt at 30300000 { > + compatible = "fsl,imx7d-gpt", "fsl,imx31-gpt"; > + reg = <0x30300000 0x10000>; > + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; @@ -273,31 +273,31 @@ Ditto > + status = "disabled"; > + }; > + -> + iomuxc: iomuxc@30330000 { +> + iomuxc: iomuxc at 30330000 { > + compatible = "fsl,imx7d-iomuxc"; > + reg = <0x30330000 0x10000>; > + }; > + -> + gpr: iomuxc-gpr@30340000 { +> + gpr: iomuxc-gpr at 30340000 { > + compatible = "fsl,imx7d-iomuxc-gpr", "syscon"; > + reg = <0x30340000 0x10000>; > + }; > + -> + ocotp: ocotp-ctrl@30350000 { +> + ocotp: ocotp-ctrl at 30350000 { > + compatible = "syscon"; > + reg = <0x30350000 0x10000>; > + clocks = <&clks IMX7D_CLK_DUMMY>; > + status = "disabled"; > + }; > + -> + anatop: anatop@30360000 { +> + anatop: anatop at 30360000 { > + compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop", > + "syscon", "simple-bus"; > + reg = <0x30360000 0x10000>; > + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; > + -> + reg_1p0d: regulator-vdd1p0d@210 { +> + reg_1p0d: regulator-vdd1p0d at 210 { > + compatible = "fsl,anatop-regulator"; > + regulator-name = "vdd1p0d"; > + regulator-min-microvolt = <800000>; @@ -312,13 +312,13 @@ Ditto > + }; > + }; > + -> + snvs: snvs@30370000 { +> + snvs: snvs at 30370000 { > + compatible = "fsl,sec-v4.0-mon", "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x30370000 0x10000>; > + -> + snvs-rtc-lp@34 { +> + snvs-rtc-lp at 34 { > + compatible = "fsl,sec-v4.0-mon-rtc-lp"; > + reg = <0x34 0x58>; > + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, @@ -326,7 +326,7 @@ Ditto > + }; > + }; > + -> + snvs-pwrkey@0x30370000 { +> + snvs-pwrkey at 0x30370000 { > + compatible = "fsl, imx7d-snvs-pwrkey", "fsl,imx6sx-snvs-pwrkey"; > + reg = <0x30370000 0x10000>; > + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; @@ -337,7 +337,7 @@ Ditto Is this supported by mainline kernel and device tree? > + -> + clks: ccm@30380000 { +> + clks: ccm at 30380000 { > + compatible = "fsl,imx7d-ccm"; > + reg = <0x30380000 0x10000>; > + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, @@ -352,14 +352,14 @@ This does not match device tree binding doc, which says: > + }; > + -> + src: src@30390000 { +> + src: src at 30390000 { > + compatible = "fsl,imx7d-src", "fsl,imx51-src", "syscon"; > + reg = <0x30390000 0x10000>; > + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; > + #reset-cells = <1>; > + }; > + -> + gpc: gpc@303a0000 { +> + gpc: gpc at 303a0000 { > + compatible = "fsl,imx7d-gpc"; > + reg = <0x303a0000 0x10000>; > + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; @@ -372,14 +372,14 @@ What is this? > + }; > + }; > + -> + aips3: aips-bus@30800000 { +> + aips3: aips-bus at 30800000 { > + compatible = "fsl,aips-bus", "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0x30800000 0x400000>; > + ranges; > + -> + uart1: serial@30860000 { +> + uart1: serial at 30860000 { > + compatible = "fsl,imx7d-uart", > + "fsl,imx6q-uart", "fsl,imx21-uart"; @@ -394,7 +394,7 @@ there is not going to help anything. > + status = "disabled"; > + }; > + -> + uart2: serial@30870000 { +> + uart2: serial at 30870000 { > + compatible = "fsl,imx7d-uart", > + "fsl,imx6q-uart", "fsl,imx21-uart"; > + reg = <0x30870000 0x10000>; @@ -405,7 +405,7 @@ there is not going to help anything. > + status = "disabled"; > + }; > + -> + uart3: serial@30880000 { +> + uart3: serial at 30880000 { > + compatible = "fsl,imx7d-uart", > + "fsl,imx6q-uart", "fsl,imx21-uart"; > + reg = <0x30880000 0x10000>; @@ -416,7 +416,7 @@ there is not going to help anything. > + status = "disabled"; > + }; > + -> + i2c1: i2c@30a20000 { +> + i2c1: i2c at 30a20000 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c"; @@ -426,7 +426,7 @@ there is not going to help anything. > + status = "disabled"; > + }; > + -> + i2c2: i2c@30a30000 { +> + i2c2: i2c at 30a30000 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c"; @@ -436,7 +436,7 @@ there is not going to help anything. > + status = "disabled"; > + }; > + -> + i2c3: i2c@30a40000 { +> + i2c3: i2c at 30a40000 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c"; @@ -446,7 +446,7 @@ there is not going to help anything. > + status = "disabled"; > + }; > + -> + i2c4: i2c@30a50000 { +> + i2c4: i2c at 30a50000 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c"; @@ -456,7 +456,7 @@ there is not going to help anything. > + status = "disabled"; > + }; > + -> + uart4: serial@30a60000 { +> + uart4: serial at 30a60000 { > + compatible = "fsl,imx7d-uart", > + "fsl,imx6q-uart", "fsl,imx21-uart"; > + reg = <0x30a60000 0x10000>; @@ -467,7 +467,7 @@ there is not going to help anything. > + status = "disabled"; > + }; > + -> + uart5: serial@30a70000 { +> + uart5: serial at 30a70000 { > + compatible = "fsl,imx7d-uart", > + "fsl,imx6q-uart", "fsl,imx21-uart"; > + reg = <0x30a70000 0x10000>; @@ -478,7 +478,7 @@ there is not going to help anything. > + status = "disabled"; > + }; > + -> + uart6: serial@30a80000 { +> + uart6: serial at 30a80000 { > + compatible = "fsl,imx7d-uart", > + "fsl,imx6q-uart", "fsl,imx21-uart"; > + reg = <0x30a80000 0x10000>; @@ -489,7 +489,7 @@ there is not going to help anything. > + status = "disabled"; > + }; > + -> + uart7: serial@30a90000 { +> + uart7: serial at 30a90000 { > + compatible = "fsl,imx7d-uart", > + "fsl,imx6q-uart", "fsl,imx21-uart"; > + reg = <0x30a90000 0x10000>; @@ -500,7 +500,7 @@ there is not going to help anything. > + status = "disabled"; > + }; > + -> + usdhc1: usdhc@30b40000 { +> + usdhc1: usdhc at 30b40000 { > + compatible = "fsl,imx7d-usdhc", "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc"; It's not helpful to have "fsl,imx6sx-usdhc" in there. @@ -517,7 +517,7 @@ Shawn > + status = "disabled"; > + }; > + -> + usdhc2: usdhc@30b50000 { +> + usdhc2: usdhc at 30b50000 { > + compatible = "fsl,imx7d-usdhc", "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc"; > + reg = <0x30b50000 0x10000>; > + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; @@ -529,7 +529,7 @@ Shawn > + status = "disabled"; > + }; > + -> + usdhc3: usdhc@30b60000 { +> + usdhc3: usdhc at 30b60000 { > + compatible = "fsl,imx7d-usdhc", "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc"; > + reg = <0x30b60000 0x10000>; > + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; diff --git a/a/content_digest b/N1/content_digest index b2e6211..0e3d62c 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,19 +1,12 @@ "ref\01430317210-18333-1-git-send-email-Frank.Li@freescale.com\0" "ref\01430317210-18333-5-git-send-email-Frank.Li@freescale.com\0" - "From\0Shawn Guo <shawn.guo@linaro.org>\0" - "Subject\0Re: [PATCH V7 04/10] ARM: dts: add imx7d soc dtsi file\0" + "From\0shawn.guo@linaro.org (Shawn Guo)\0" + "Subject\0[PATCH V7 04/10] ARM: dts: add imx7d soc dtsi file\0" "Date\0Thu, 7 May 2015 21:53:34 +0800\0" - "To\0Frank.Li@freescale.com\0" - "Cc\0lznuaa@gmail.com" - linus.walleij@linaro.org - robh+dt@kernel.org - linux-arm-kernel@lists.infradead.org - linux-gpio@vger.kernel.org - devicetree@vger.kernel.org - " Anson Huang <b20788@freescale.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" - "On Wed, Apr 29, 2015 at 10:20:04PM +0800, Frank.Li@freescale.com wrote:\n" + "On Wed, Apr 29, 2015 at 10:20:04PM +0800, Frank.Li at freescale.com wrote:\n" "> From: Frank Li <Frank.Li@freescale.com>\n" "> \n" "> Add i.mx7d support:\n" @@ -109,7 +102,7 @@ "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\tcpu0: cpu@0 {\n" + "> +\t\tcpu0: cpu at 0 {\n" "> +\t\t\tcompatible = \"arm,cortex-a7\";\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\treg = <0>;\n" @@ -125,7 +118,7 @@ "> +\t\t};\n" "> +\t};\n" "> +\n" - "> +\tintc: interrupt-controller@31001000 {\n" + "> +\tintc: interrupt-controller at 31001000 {\n" "> +\t\tcompatible = \"arm,cortex-a7-gic\";\n" "> +\t\t#interrupt-cells = <3>;\n" "> +\t\tinterrupt-controller;\n" @@ -156,14 +149,14 @@ "> +\t\tinterrupt-parent = <&intc>;\n" "> +\t\tranges;\n" "> +\n" - "> +\t\taips1: aips-bus@30000000 {\n" + "> +\t\taips1: aips-bus at 30000000 {\n" "> +\t\t\tcompatible = \"fsl,aips-bus\", \"simple-bus\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <1>;\n" "> +\t\t\treg = <0x30000000 0x400000>;\n" "> +\t\t\tranges;\n" "> +\n" - "> +\t\t\tgpio1: gpio@30200000 {\n" + "> +\t\t\tgpio1: gpio at 30200000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-gpio\", \"fsl,imx35-gpio\";\n" "> +\t\t\t\treg = <0x30200000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, /* GPIO1_INT15_0 */\n" @@ -174,7 +167,7 @@ "> +\t\t\t\t#interrupt-cells = <2>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgpio2: gpio@30210000 {\n" + "> +\t\t\tgpio2: gpio at 30210000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-gpio\", \"fsl,imx35-gpio\";\n" "> +\t\t\t\treg = <0x30210000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -185,7 +178,7 @@ "> +\t\t\t\t#interrupt-cells = <2>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgpio3: gpio@30220000 {\n" + "> +\t\t\tgpio3: gpio at 30220000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-gpio\", \"fsl,imx35-gpio\";\n" "> +\t\t\t\treg = <0x30220000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -196,7 +189,7 @@ "> +\t\t\t\t#interrupt-cells = <2>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgpio4: gpio@30230000 {\n" + "> +\t\t\tgpio4: gpio at 30230000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-gpio\", \"fsl,imx35-gpio\";\n" "> +\t\t\t\treg = <0x30230000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -207,7 +200,7 @@ "> +\t\t\t\t#interrupt-cells = <2>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgpio5: gpio@30240000 {\n" + "> +\t\t\tgpio5: gpio at 30240000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-gpio\", \"fsl,imx35-gpio\";\n" "> +\t\t\t\treg = <0x30240000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -224,7 +217,7 @@ "> +\t\t\t\t#interrupt-cells = <2>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgpio6: gpio@30250000 {\n" + "> +\t\t\tgpio6: gpio at 30250000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-gpio\", \"fsl,imx35-gpio\";\n" "> +\t\t\t\treg = <0x30250000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -235,7 +228,7 @@ "> +\t\t\t\t#interrupt-cells = <2>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgpio7: gpio@30260000 {\n" + "> +\t\t\tgpio7: gpio at 30260000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-gpio\", \"fsl,imx35-gpio\";\n" "> +\t\t\t\treg = <0x30260000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -246,7 +239,7 @@ "> +\t\t\t\t#interrupt-cells = <2>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgpt1: gpt@302d0000 {\n" + "> +\t\t\tgpt1: gpt at 302d0000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-gpt\", \"fsl,imx31-gpt\";\n" "> +\t\t\t\treg = <0x302d0000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -255,7 +248,7 @@ "> +\t\t\t\tclock-names = \"ipg\", \"per\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgpt2: gpt@302e0000 {\n" + "> +\t\t\tgpt2: gpt at 302e0000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-gpt\", \"fsl,imx31-gpt\";\n" "> +\t\t\t\treg = <0x302e0000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -265,7 +258,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgpt3: gpt@302f0000 {\n" + "> +\t\t\tgpt3: gpt at 302f0000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-gpt\", \"fsl,imx31-gpt\";\n" "> +\t\t\t\treg = <0x302f0000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -275,7 +268,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgpt4: gpt@30300000 {\n" + "> +\t\t\tgpt4: gpt at 30300000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-gpt\", \"fsl,imx31-gpt\";\n" "> +\t\t\t\treg = <0x30300000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -288,31 +281,31 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tiomuxc: iomuxc@30330000 {\n" + "> +\t\t\tiomuxc: iomuxc at 30330000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-iomuxc\";\n" "> +\t\t\t\treg = <0x30330000 0x10000>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgpr: iomuxc-gpr@30340000 {\n" + "> +\t\t\tgpr: iomuxc-gpr at 30340000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-iomuxc-gpr\", \"syscon\";\n" "> +\t\t\t\treg = <0x30340000 0x10000>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tocotp: ocotp-ctrl@30350000 {\n" + "> +\t\t\tocotp: ocotp-ctrl at 30350000 {\n" "> +\t\t\t\tcompatible = \"syscon\";\n" "> +\t\t\t\treg = <0x30350000 0x10000>;\n" "> +\t\t\t\tclocks = <&clks IMX7D_CLK_DUMMY>;\n" "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tanatop: anatop@30360000 {\n" + "> +\t\t\tanatop: anatop at 30360000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-anatop\", \"fsl,imx6q-anatop\",\n" "> +\t\t\t\t\t\"syscon\", \"simple-bus\";\n" "> +\t\t\t\treg = <0x30360000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,\n" "> +\t\t\t\t\t<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;\n" "> +\n" - "> +\t\t\t\treg_1p0d: regulator-vdd1p0d@210 {\n" + "> +\t\t\t\treg_1p0d: regulator-vdd1p0d at 210 {\n" "> +\t\t\t\t\tcompatible = \"fsl,anatop-regulator\";\n" "> +\t\t\t\t\tregulator-name = \"vdd1p0d\";\n" "> +\t\t\t\t\tregulator-min-microvolt = <800000>;\n" @@ -327,13 +320,13 @@ "> +\t\t\t\t};\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tsnvs: snvs@30370000 {\n" + "> +\t\t\tsnvs: snvs at 30370000 {\n" "> +\t\t\t\tcompatible = \"fsl,sec-v4.0-mon\", \"simple-bus\";\n" "> +\t\t\t\t#address-cells = <1>;\n" "> +\t\t\t\t#size-cells = <1>;\n" "> +\t\t\t\tranges = <0 0x30370000 0x10000>;\n" "> +\n" - "> +\t\t\t\tsnvs-rtc-lp@34 {\n" + "> +\t\t\t\tsnvs-rtc-lp at 34 {\n" "> +\t\t\t\t\tcompatible = \"fsl,sec-v4.0-mon-rtc-lp\";\n" "> +\t\t\t\t\treg = <0x34 0x58>;\n" "> +\t\t\t\t\tinterrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -341,7 +334,7 @@ "> +\t\t\t\t};\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tsnvs-pwrkey@0x30370000 {\n" + "> +\t\t\tsnvs-pwrkey at 0x30370000 {\n" "> +\t\t\t\tcompatible = \"fsl, imx7d-snvs-pwrkey\", \"fsl,imx6sx-snvs-pwrkey\";\n" "> +\t\t\t\treg = <0x30370000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -352,7 +345,7 @@ "Is this supported by mainline kernel and device tree?\n" "\n" "> +\n" - "> +\t\t\tclks: ccm@30380000 {\n" + "> +\t\t\tclks: ccm at 30380000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-ccm\";\n" "> +\t\t\t\treg = <0x30380000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -367,14 +360,14 @@ "\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tsrc: src@30390000 {\n" + "> +\t\t\tsrc: src at 30390000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-src\", \"fsl,imx51-src\", \"syscon\";\n" "> +\t\t\t\treg = <0x30390000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;\n" "> +\t\t\t\t#reset-cells = <1>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tgpc: gpc@303a0000 {\n" + "> +\t\t\tgpc: gpc at 303a0000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-gpc\";\n" "> +\t\t\t\treg = <0x303a0000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -387,14 +380,14 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\taips3: aips-bus@30800000 {\n" + "> +\t\taips3: aips-bus at 30800000 {\n" "> +\t\t\tcompatible = \"fsl,aips-bus\", \"simple-bus\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <1>;\n" "> +\t\t\treg = <0x30800000 0x400000>;\n" "> +\t\t\tranges;\n" "> +\n" - "> +\t\t\tuart1: serial@30860000 {\n" + "> +\t\t\tuart1: serial at 30860000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-uart\",\n" "> +\t\t\t\t\t \"fsl,imx6q-uart\", \"fsl,imx21-uart\";\n" "\n" @@ -409,7 +402,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tuart2: serial@30870000 {\n" + "> +\t\t\tuart2: serial at 30870000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-uart\",\n" "> +\t\t\t\t\t \"fsl,imx6q-uart\", \"fsl,imx21-uart\";\n" "> +\t\t\t\treg = <0x30870000 0x10000>;\n" @@ -420,7 +413,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tuart3: serial@30880000 {\n" + "> +\t\t\tuart3: serial at 30880000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-uart\",\n" "> +\t\t\t\t\t \"fsl,imx6q-uart\", \"fsl,imx21-uart\";\n" "> +\t\t\t\treg = <0x30880000 0x10000>;\n" @@ -431,7 +424,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ti2c1: i2c@30a20000 {\n" + "> +\t\t\ti2c1: i2c at 30a20000 {\n" "> +\t\t\t\t#address-cells = <1>;\n" "> +\t\t\t\t#size-cells = <0>;\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-i2c\", \"fsl,imx21-i2c\";\n" @@ -441,7 +434,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ti2c2: i2c@30a30000 {\n" + "> +\t\t\ti2c2: i2c at 30a30000 {\n" "> +\t\t\t\t#address-cells = <1>;\n" "> +\t\t\t\t#size-cells = <0>;\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-i2c\", \"fsl,imx21-i2c\";\n" @@ -451,7 +444,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ti2c3: i2c@30a40000 {\n" + "> +\t\t\ti2c3: i2c at 30a40000 {\n" "> +\t\t\t\t#address-cells = <1>;\n" "> +\t\t\t\t#size-cells = <0>;\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-i2c\", \"fsl,imx21-i2c\";\n" @@ -461,7 +454,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ti2c4: i2c@30a50000 {\n" + "> +\t\t\ti2c4: i2c at 30a50000 {\n" "> +\t\t\t\t#address-cells = <1>;\n" "> +\t\t\t\t#size-cells = <0>;\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-i2c\", \"fsl,imx21-i2c\";\n" @@ -471,7 +464,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tuart4: serial@30a60000 {\n" + "> +\t\t\tuart4: serial at 30a60000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-uart\",\n" "> +\t\t\t\t\t \"fsl,imx6q-uart\", \"fsl,imx21-uart\";\n" "> +\t\t\t\treg = <0x30a60000 0x10000>;\n" @@ -482,7 +475,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tuart5: serial@30a70000 {\n" + "> +\t\t\tuart5: serial at 30a70000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-uart\",\n" "> +\t\t\t\t\t \"fsl,imx6q-uart\", \"fsl,imx21-uart\";\n" "> +\t\t\t\treg = <0x30a70000 0x10000>;\n" @@ -493,7 +486,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tuart6: serial@30a80000 {\n" + "> +\t\t\tuart6: serial at 30a80000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-uart\",\n" "> +\t\t\t\t\t \"fsl,imx6q-uart\", \"fsl,imx21-uart\";\n" "> +\t\t\t\treg = <0x30a80000 0x10000>;\n" @@ -504,7 +497,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tuart7: serial@30a90000 {\n" + "> +\t\t\tuart7: serial at 30a90000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-uart\",\n" "> +\t\t\t\t\t \"fsl,imx6q-uart\", \"fsl,imx21-uart\";\n" "> +\t\t\t\treg = <0x30a90000 0x10000>;\n" @@ -515,7 +508,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tusdhc1: usdhc@30b40000 {\n" + "> +\t\t\tusdhc1: usdhc at 30b40000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-usdhc\", \"fsl,imx6sx-usdhc\", \"fsl,imx6sl-usdhc\";\n" "\n" "It's not helpful to have \"fsl,imx6sx-usdhc\" in there.\n" @@ -532,7 +525,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tusdhc2: usdhc@30b50000 {\n" + "> +\t\t\tusdhc2: usdhc at 30b50000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-usdhc\", \"fsl,imx6sx-usdhc\", \"fsl,imx6sl-usdhc\";\n" "> +\t\t\t\treg = <0x30b50000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -544,7 +537,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tusdhc3: usdhc@30b60000 {\n" + "> +\t\t\tusdhc3: usdhc at 30b60000 {\n" "> +\t\t\t\tcompatible = \"fsl,imx7d-usdhc\", \"fsl,imx6sx-usdhc\", \"fsl,imx6sl-usdhc\";\n" "> +\t\t\t\treg = <0x30b60000 0x10000>;\n" "> +\t\t\t\tinterrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -562,4 +555,4 @@ "> 1.9.1\n" > -1dd4d6e9ac8d7dc93874835e8d6850f493159ecd846eaae5dcaa9f99ca918fa9 +f8c2ddd41528de97ab40e356250ab05db734e73480530009cd816c7b849e1f6d
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.