[U-Boot] [PATCHv3] mtd: sf: Add CONFIG_SPI_N25Q256A_RESET for software-reset

[Pavel Machek <pavel@denx.de>]

On Sun 2015-05-10 18:25:59, Marek Vasut wrote:
> On Sunday, May 10, 2015 at 02:24:01 PM, Jagan Teki wrote:
> > On 10 May 2015 at 16:19, Pavel Machek <pavel@denx.de> wrote:
> > > On Sun 2015-05-10 11:15:41, Pavel Machek wrote:
> > > Add reset for N25Q256A SPI NOR, as U-Boot SPL 2013-socfpga (only
> > > version working on that board) sets 4-byte addressing mode.
> > > 
> > > Signed-off-by: Pavel Machek <pavel@denx.de>
> 
> So, I took one more look into the datasheet [1]. With this chip, which
> is 128Mbit (16MByte), you don't even use 4-byte addressing so you don't
> care about it at all.
> 
> But you actually do care about it if your hardware is broken and you use
> the N25Q256A [2] part. If the problem really is just between the
> U-Boot

No, I actually care whenever I use the U-boot SPL 2013, which is the
only option today. And I explained it to you already. (Additionally,
hardware might be broken. That has nothing to do with _this_ problem).

> SPL and U-Boot (which I doubt btw), you can probably augment U-Boot such
> that it reads FSR (Flag Status Register, see page 27, table 17, bit 0).
> This bit tells you whether the part is in 3-byte or 4-byte mode and you
> can read this register in either mode.

How does reading Micron-specific register help with code being too
Micron-specific is unclear to me.

								Pavel
> 
> Same applies to N25Q512A [3], FSR bit 0 indicates the mode.
> 
> [1] https://www.micron.com/~/media/documents/products/data-sheet/nor-
> flash/serial-nor/n25q/n25q_128mb_1_8v_65nm.pdf
> [2] https://www.micron.com/~/media/documents/products/data-sheet/nor-
> flash/serial-nor/n25q/n25q_256mb_3v_65nm.pdf
> [3] https://www.micron.com/~/media/documents/products/data-sheet/nor-
> flash/serial-nor/n25q/n25q_512mb_1ce_3v_65nm.pdf
> 
> Best regards,
> Marek Vasut

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