Re: [PATCH 1/2] MIPS: malta-time: Don't switch RTC to BCD mode

[Ralf Baechle <ralf@linux-mips.org>]

On Thu, May 14, 2015 at 11:53:22AM +0100, Maciej W. Rozycki wrote:

> > > The reason for init_rtc was touched upon in the commit message for
> > > a87ea88d8f6c (MIPS: Malta: initialise the RTC at boot) but could perhaps
> > > have been clearer. Straight out of reset the RTC may not be running at
> > > all, but the code in estimate_frequencies (note: not the RTC driver)
> > > relies upon the RTC having been started. This was an issue when using
> > > earlier builds of U-boot which didn't touch the RTC at all, and is still
> > > an issue if you do something like load the kernel via a JTAG probe
> > > rather than using U-boot or YAMON. If the kernel doesn't ensure the RTC
> > > is started then it'll just hang in estimate_frequencies waiting for the
> > > UIP bit to change even though it never will. YAMON isn't the only way to
> > > boot on Malta, and dependencies such as this between the kernel & the
> > > bootloader should really be minimised.
> 
>  You do need to take reverse dependencies into account though, such as 
> this one where YAMON relies upon a certain state of hardware (that it 
> does initialise) to function correctly.  Granted, this RTC issue is 
> probably the only one as other hardware on the Malta board does not 
> carry initialised state over reset I believe.
> 
> > > ...and since it seems the U-boot & YAMON RTC drivers use it in different
> > > modes, I'd consider this patch reasonable. Feel free to have my:
> > > 
> > >   Reviewed-by: Paul Burton <paul.burton@imgtec.com>
> > 
> > Thanks Paul,
> > 
> > Assuming Maciej is satisfied I'll rewrite the commit message, add a
> > stable tag, and resend.
> 
>  I'd prefer RTC state not to be touched at all if its state is sane.  
> That is read Register B, check for the only valid divider setting 
> (32kHz), and if so then exit right away, and otherwise initialise the 
> chip from scratch.  Consistency with YAMON might be a good idea in that 
> initialisation, but I have no strong feeling towards that.  If you think 
> there's value in having the chip set to the BCD mode, then feel free to 
> keep that option.
> 
>  Note that any inhibition of the RTC previously initialised by 
> temporarily setting the SET bit in Register B during bootstrap will 
> disturb timekeeping that the system may carry over reset using 
> adjtimex(8).

So you're instead suggesting to revoke a87ea88d8f6c ?

If YAMON and U-Boot are differing in RTC handling then I suggest to
treat that as a U-Boot bug.  YAMON was there first.  However these
Malta kernels are also frequently booted without firmware in Qemu.
No idea how Qemu initializes the RTC.

  Ralf