From: "Michael S. Tsirkin" <mst@redhat.com>
To: Shannon Zhao <zhaoshenglong@huawei.com>
Cc: peter.maydell@linaro.org, hangaohuai@huawei.com,
a.spyridakis@virtualopensystems.com, claudio.fontana@huawei.com,
qemu-devel@nongnu.org, peter.huangpeng@huawei.com,
alex.bennee@linaro.org, hanjun.guo@linaro.org,
imammedo@redhat.com, pbonzini@redhat.com, lersek@redhat.com,
christoffer.dall@linaro.org, shannon.zhao@linaro.org
Subject: Re: [Qemu-devel] [PATCH v7 05/23] hw/acpi/aml-build: Add aml_interrupt() term
Date: Mon, 18 May 2015 18:07:31 +0200 [thread overview]
Message-ID: <20150518180706-mutt-send-email-mst@redhat.com> (raw)
In-Reply-To: <1431595182-7552-6-git-send-email-zhaoshenglong@huawei.com>
On Thu, May 14, 2015 at 05:19:24PM +0800, Shannon Zhao wrote:
> From: Shannon Zhao <shannon.zhao@linaro.org>
>
> Add aml_interrupt() for describing device interrupt in resource template.
> These can be used to generating DSDT table for ACPI on ARM.
>
> Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com>
> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
> ---
> hw/acpi/aml-build.c | 23 +++++++++++++++++++++
> include/hw/acpi/aml-build.h | 50 +++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 73 insertions(+)
>
> diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
> index ce68d27..7553bfc 100644
> --- a/hw/acpi/aml-build.c
> +++ b/hw/acpi/aml-build.c
> @@ -530,6 +530,29 @@ Aml *aml_memory32_fixed(uint32_t addr, uint32_t size,
> return var;
> }
>
> +/*
> + * ACPI 1.0: 6.4.3.6 Interrupt (Interrupt Resource Descriptor Macro)
> + */
> +Aml *aml_interrupt(AmlConsumerAndProducer con_and_pro,
> + AmlLevelAndEdge level_and_edge,
> + AmlActiveHighAndLow high_and_low,
> + AmlExclusiveAndShared exclusive_and_shared,
> + AmlWakeCap wake_capable, uint32_t irq)
> +{
> + Aml *var = aml_alloc();
> + uint8_t irq_flags = con_and_pro | (level_and_edge << 1)
> + | (high_and_low << 2) | (exclusive_and_shared << 3)
> + | (wake_capable << 4);
> +
> + build_append_byte(var->buf, 0x89); /* Extended irq descriptor */
> + build_append_byte(var->buf, 6); /* Length, bits[7:0] minimum value = 6 */
> + build_append_byte(var->buf, 0); /* Length, bits[15:8] minimum value = 0 */
> + build_append_byte(var->buf, irq_flags); /* Interrupt Vector Information. */
> + build_append_byte(var->buf, 0x01); /* Interrupt table length = 1 */
> + build_append_uint32(var->buf, irq); /* Interrupt Number */
> + return var;
> +}
> +
> /* ACPI 1.0b: 6.4.2.5 I/O Port Descriptor */
> Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base,
> uint8_t aln, uint8_t len)
> diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
> index b1413a3..586a742 100644
> --- a/include/hw/acpi/aml-build.h
> +++ b/include/hw/acpi/aml-build.h
> @@ -111,6 +111,51 @@ typedef enum {
> aml_ReadWrite = 1,
> } AmlReadAndWrite;
>
> +/*
> + * ACPI 1.0b: Table 6-28 Extended Interrupt Descriptor Definition
> + * Interrupt Vector Flags Bits[0] Consumer/Producer
> + */
> +typedef enum {
> + aml_consumer_producer = 0,
> + aml_consumer = 1,
> +} AmlConsumerAndProducer;
> +
> +/*
> + * ACPI 1.0b: Table 6-28 Extended Interrupt Descriptor Definition
> + * _HE field definition
> + */
> +typedef enum {
> + aml_level = 0,
> + aml_edge = 1,
> +} AmlLevelAndEdge;
> +
> +/*
> + * ACPI 1.0b: Table 6-28 Extended Interrupt Descriptor Definition
> + * _LL field definition
> + */
> +typedef enum {
> + aml_active_high = 0,
> + aml_active_low = 1,
> +} AmlActiveHighAndLow;
> +
> +/*
> + * ACPI 1.0b: Table 6-28 Extended Interrupt Descriptor Definition
> + * _SHR field definition
> + */
> +typedef enum {
> + aml_exclusive = 0,
> + aml_shared = 1,
> +} AmlExclusiveAndShared;
> +
> +/*
> + * ACPI 5.1: Table 6-203 Extended Interrupt Descriptor Definition
> + * _WKC field definition
> + */
> +typedef enum {
> + aml_not_wake_capable = 0,
> + aml_wake_capable = 1,
> +} AmlWakeCap;
> +
> typedef
> struct AcpiBuildTables {
> GArray *table_data;
Please fix enum values to be upper case, to match coding style.
> @@ -170,6 +215,11 @@ Aml *aml_call3(const char *method, Aml *arg1, Aml *arg2, Aml *arg3);
> Aml *aml_call4(const char *method, Aml *arg1, Aml *arg2, Aml *arg3, Aml *arg4);
> Aml *aml_memory32_fixed(uint32_t addr, uint32_t size,
> AmlReadAndWrite read_and_write);
> +Aml *aml_interrupt(AmlConsumerAndProducer con_and_pro,
> + AmlLevelAndEdge level_and_edge,
> + AmlActiveHighAndLow high_and_low,
> + AmlExclusiveAndShared exclusive_and_shared,
> + AmlWakeCap wake_capable, uint32_t irq);
> Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base,
> uint8_t aln, uint8_t len);
> Aml *aml_operation_region(const char *name, AmlRegionSpace rs,
> --
> 2.1.0
>
next prev parent reply other threads:[~2015-05-18 16:07 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-14 9:19 [Qemu-devel] [PATCH v7 00/23] Generate ACPI v5.1 tables and expose them to guest over fw_cfg on ARM Shannon Zhao
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 01/23] hw/arm/virt: Move common definitions to virt.h Shannon Zhao
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 02/23] hw/arm/virt: Record PCIe ranges in MemMapEntry array Shannon Zhao
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 03/23] hw/arm/virt-acpi-build: Basic framework for building ACPI tables on ARM Shannon Zhao
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 04/23] hw/acpi/aml-build: Add aml_memory32_fixed() term Shannon Zhao
2015-05-18 16:06 ` Michael S. Tsirkin
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 05/23] hw/acpi/aml-build: Add aml_interrupt() term Shannon Zhao
2015-05-18 16:07 ` Michael S. Tsirkin [this message]
2015-05-20 4:23 ` [Qemu-devel] [RESEND PATCH " Shannon Zhao
2015-05-20 11:05 ` Igor Mammedov
2015-05-20 11:28 ` Shannon Zhao
2015-05-20 13:49 ` Igor Mammedov
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 06/23] hw/arm/virt-acpi-build: Generation of DSDT table for virt devices Shannon Zhao
2015-05-21 14:30 ` Alex Bennée
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 07/23] hw/arm/virt-acpi-build: Generate FADT table and update ACPI headers Shannon Zhao
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 08/23] hw/arm/virt-acpi-build: Generate MADT table Shannon Zhao
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 09/23] hw/arm/virt-acpi-build: Generate GTDT table Shannon Zhao
2015-05-21 14:31 ` Alex Bennée
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 10/23] hw/arm/virt-acpi-build: Generate RSDT table Shannon Zhao
2015-05-21 14:38 ` Alex Bennée
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 11/23] hw/arm/virt-acpi-build: Generate RSDP table Shannon Zhao
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 12/23] hw/arm/virt-acpi-build: Generate MCFG table Shannon Zhao
2015-05-21 14:38 ` Alex Bennée
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 13/23] hw/acpi/aml-build: Make aml_buffer() definition consistent with the spec Shannon Zhao
2015-05-18 16:08 ` Michael S. Tsirkin
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 14/23] hw/acpi/aml-build: Add ToUUID macro Shannon Zhao
2015-05-18 16:17 ` Michael S. Tsirkin
2015-05-18 18:34 ` Laszlo Ersek
2015-05-19 0:41 ` Shannon Zhao
2015-05-19 8:37 ` Michael S. Tsirkin
2015-05-20 4:19 ` [Qemu-devel] [RESEND PATCH " Shannon Zhao
2015-05-20 10:57 ` Igor Mammedov
2015-05-20 11:02 ` Shannon Zhao
2015-05-20 13:41 ` Igor Mammedov
2015-05-20 13:46 ` Shannon Zhao
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 15/23] hw/acpi/aml-build: Add aml_or() term Shannon Zhao
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 16/23] hw/acpi/aml-build: Add aml_lnot() term Shannon Zhao
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 17/23] hw/acpi/aml-build: Add aml_else() term Shannon Zhao
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 18/23] hw/acpi/aml-build: Add aml_create_dword_field() term Shannon Zhao
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 19/23] hw/acpi/aml-build: Add aml_dword_io() term Shannon Zhao
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 20/23] hw/acpi/aml-build: Add Unicode macro Shannon Zhao
2015-05-18 16:18 ` Michael S. Tsirkin
2015-05-20 5:00 ` [Qemu-devel] [RESEND PATCH " Shannon Zhao
2015-05-20 11:01 ` Igor Mammedov
2015-05-20 11:12 ` Shannon Zhao
2015-05-20 13:47 ` Igor Mammedov
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 21/23] hw/arm/virt-acpi-build: Add PCIe controller in ACPI DSDT table Shannon Zhao
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 22/23] ACPI: split CONFIG_ACPI into 4 pieces Shannon Zhao
2015-05-18 16:19 ` Michael S. Tsirkin
2015-05-20 5:02 ` [Qemu-devel] [RESEND PATCH " Shannon Zhao
2015-05-14 9:19 ` [Qemu-devel] [PATCH v7 23/23] hw/arm/virt: Enable dynamic generation of ACPI v5.1 tables Shannon Zhao
2015-05-18 15:59 ` [Qemu-devel] [PATCH v7 00/23] Generate ACPI v5.1 tables and expose them to guest over fw_cfg on ARM Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150518180706-mutt-send-email-mst@redhat.com \
--to=mst@redhat.com \
--cc=a.spyridakis@virtualopensystems.com \
--cc=alex.bennee@linaro.org \
--cc=christoffer.dall@linaro.org \
--cc=claudio.fontana@huawei.com \
--cc=hangaohuai@huawei.com \
--cc=hanjun.guo@linaro.org \
--cc=imammedo@redhat.com \
--cc=lersek@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peter.huangpeng@huawei.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=shannon.zhao@linaro.org \
--cc=zhaoshenglong@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.