Re: Mwait usage on AMD processors

[Huang Rui <ray.huang@amd.com>]

On Tue, May 19, 2015 at 04:50:17PM +0800, Borislav Petkov wrote:
> On Tue, May 19, 2015 at 03:25:53PM +0800, Huang Rui wrote:
> > Apology that cause to misunderstand. It's not as same as intel.
> > Intel is able to go to C1E like you said, the C1E has less power
> > consumption than C1 on Intel platform.
> 
> You still misunderstand - I'm not talking about Intel platforms here but
> AMD ones. On AMD we never enter idle with MWAIT - we do HLT which enters
> C1 and then the hw enters C1E when a bunch of conditions are fulfilled.
> 

OK, got it. I see on AMD platforms, we all use default_idle (HLT).

> > The faster waiting exit speed. But it's hard to test the improvement,
> > do you have any idea? It's told by HW designer.
> 
> You can test the improvement with a special setup only. Unless you can
> read out power consumption of a box while it is idle.
> 

Could you please explain how to create the "special setup"? Actually,
that's my difficulty.

> The exit-idle speed only does not suffice to switch to MWAIT though,
> IMHO. I think power consumption in idle should be the relevant metric
> here.
> 

Yes, I agree with you. So that's why I was asking to provide an
optional parameter, not set it default. 

> > Current CPU, power consumption cannot go to deeper low power state
> > (C1) via mwaitx/mwait. But HW designers will implement it in future
> > processors.
> 
> So future CPUs we will switch to MWAIT. I don't see a problem with that.
> 

Yes, at that time, we would like to use mwaitx/mwait as default idle
routine for AMD.

Thanks,
Rui