Re: [PATCH 2/3] pinctrl: tegra-xusb: Fix allocation of pins

[Thierry Reding <thierry.reding@gmail.com>]

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On Tue, May 19, 2015 at 03:14:22PM +0100, Jon Hunter wrote:
[...]

One more thing:

[...]
> diff --git a/drivers/pinctrl/pinctrl-tegra-xusb.c b/drivers/pinctrl/pinctrl-tegra-xusb.c
> index 3e8e4a914fb4..c61594066e26 100644
> --- a/drivers/pinctrl/pinctrl-tegra-xusb.c
> +++ b/drivers/pinctrl/pinctrl-tegra-xusb.c
> @@ -125,6 +125,23 @@ static const char *tegra_xusb_padctl_get_group_name(struct pinctrl_dev *pinctrl,
>  	return padctl->soc->pins[group].name;
>  }
>  
> +static int tegra_xusb_padctl_get_group_pins(struct pinctrl_dev *pinctrl,
> +					    unsigned group,
> +					    const unsigned **pins,
> +					    unsigned *num_pins)
> +{
> +	struct tegra_xusb_padctl *padctl = pinctrl_dev_get_drvdata(pinctrl);
> +
> +	/*
> +	 * For the tegra-xusb pad controller groups are synonomous
> +	 * with lanes/pins and there is always one lane/pin per group.
> +	 */
> +	*pins = &padctl->soc->pins[group].number;

Shouldn't this be the same as pinctrl->desc->pins? In that case, maybe a
better solution would be to make .get_group_pins() mandatory again and
turn this into a pinctrl helper function that can be used by all group-
only pinctrl drivers?

Thierry

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