From mboxrd@z Thu Jan  1 00:00:00 1970
Date: Thu, 21 May 2015 19:10:18 +0200
From: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org>
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Subject: Re: [Xenomai] 3.14 hangs with ipipe patch applied
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To: Lennart Sorensen <lsorense@csclub.uwaterloo.ca>
Cc: xenomai@xenomai.org

On Thu, May 21, 2015 at 01:07:16PM -0400, Lennart Sorensen wrote:
> On Thu, May 21, 2015 at 01:04:32PM -0400, Lennart Sorensen wrote:
> > OK, I was not sure, hence why I wanted to ask.
> > 
> > Let me fix that up and try that.  Then I should do a build with
> > CONFIG_IPIPE=y and see if that then starts to work.
> > 
> > At least this is progress.
> 
> So this perhaps:
> 
> --- debian/patches/ipipe-core-3.14.39.diff.original     2015-05-21 12:32:53.669255161 -0400
> +++ debian/patches/ipipe-core-3.14.39.diff      2015-05-21 13:06:12.075112664 -0400
> @@ -24605,7 +24605,7 @@
>   static void gic_mask_irq(struct irq_data *d)
>   {
>  -      u32 mask = 1 << (gic_irq(d) % 32);
> -+      u32 mask = 1 << (d->irq % 32);
> ++      u32 mask = 1 << (gic_irq(d) % 32);
>  +      unsigned long flags;
>   
>  -      raw_spin_lock(&irq_controller_lock);
> @@ -24621,7 +24621,7 @@
>   static void gic_unmask_irq(struct irq_data *d)
>   {
>  -      u32 mask = 1 << (gic_irq(d) % 32);
> -+      u32 mask = 1 << (d->irq % 32);
> ++      u32 mask = 1 << (gic_irq(d) % 32);
>  +      unsigned long flags;
>   
>  -      raw_spin_lock(&irq_controller_lock);
> @@ -24652,7 +24652,7 @@
>  +
>  +static void gic_hold_irq(struct irq_data *d)
>  +{
> -+      u32 mask = 1 << (d->irq % 32);
> ++      u32 mask = 1 << (gic_irq(d) % 32);
>  +      unsigned long flags;
>  +
>  +      raw_spin_lock_irqsave_cond(&irq_controller_lock, flags);
> @@ -24668,7 +24668,7 @@
>  +
>  +static void gic_release_irq(struct irq_data *d)
>  +{
> -+      u32 mask = 1 << (d->irq % 32);
> ++      u32 mask = 1 << (gic_irq(d) % 32);
>  +      unsigned long flags;
>  +
>  +      raw_spin_lock_irqsave_cond(&irq_controller_lock, flags);

Actually, gic_mask_irq and gic_unmask_irq should be identical to the
unpatched kernel with regard to registers reads and writes. And
gic_hold_irq/gic_release_irq should be identical to gic_mask/unmask.

-- 
					    Gilles.